dc.creator | Mora Gutiérrez, José Miguel | es |
dc.creator | Jiménez Fernández, Carlos Jesús | es |
dc.creator | Valencia Barrero, Manuel | es |
dc.date.accessioned | 2021-03-15T11:33:39Z | |
dc.date.available | 2021-03-15T11:33:39Z | |
dc.date.issued | 2017 | |
dc.identifier.citation | Mora Gutiérrez, J.M., Jiménez Fernández, C.J. y Valencia Barrero, M. (2017). Multiradix Trivium Implementations for Low-Power IoT Hardware. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 25 (12), 3401-3405. | |
dc.identifier.issn | 1063-8210 | es |
dc.identifier.uri | https://hdl.handle.net/11441/106052 | |
dc.description.abstract | The integration of lightweight symmetric encryption is
becoming increasingly widespread in very low-power Internet of Things
applications, with the rapid emergence of very low energy block and
stream ciphers in portable and wireless systems. Trivium is one of
the lightweight stream ciphers shortlisted for the hardware profile
of the eSTREAM project. This paper describes low-power multiradix
Trivium implementations based on the use of parallelization techniques
to reduce dynamic power consumption. The low-power Trivium designs
were implemented and characterized in TSMC 90 nm to compare area
resources and power reduction. The implementation results show that
our proposed designs offer dynamic power savings of 31%–45% with
radix-1 and radix-2 when compared with the standard Trivium, and 15%
with radix-8. There is no improvement, however, with radix-16. | es |
dc.description.sponsorship | Ministerio de Economía y Competitividad TEC2013-45523-R | es |
dc.description.sponsorship | Ministerio de Economía y Competitividad TEC2016-80549-R | es |
dc.description.sponsorship | Ministerio de Economía y Competitividad CSIC 201550E039 | es |
dc.format | application/pdf | es |
dc.format.extent | 5 | es |
dc.language.iso | eng | es |
dc.publisher | IEEE Computer Society | es |
dc.relation.ispartof | IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 25 (12), 3401-3405. | |
dc.rights | Attribution-NonCommercial-NoDerivatives 4.0 Internacional | * |
dc.rights.uri | http://creativecommons.org/licenses/by-nc-nd/4.0/ | * |
dc.subject | Application-specific integrated circuit (ASIC) implementation | es |
dc.subject | Internet of Things (IoT) hardware | es |
dc.subject | lightweight cryptography | es |
dc.subject | Low-power | es |
dc.subject | Stream Cipher | es |
dc.subject | Trivium | es |
dc.title | Multiradix Trivium Implementations for Low-Power IoT Hardware | es |
dc.type | info:eu-repo/semantics/article | es |
dcterms.identifier | https://ror.org/03yxnpp24 | |
dc.type.version | info:eu-repo/semantics/submittedVersion | es |
dc.rights.accessRights | info:eu-repo/semantics/openAccess | es |
dc.contributor.affiliation | Universidad de Sevilla. Departamento de Tecnología Electrónica | es |
dc.relation.projectID | TEC2013-45523-R | es |
dc.relation.projectID | TEC2016-80549-R | es |
dc.relation.projectID | CSIC 201550E039 | es |
dc.relation.publisherversion | https://ieeexplore.ieee.org/document/8030347 | es |
dc.identifier.doi | 10.1109/TVLSI.2017.2736063 | es |
dc.journaltitle | IEEE Transactions on Very Large Scale Integration (VLSI) Systems | es |
dc.publication.volumen | 25 | es |
dc.publication.issue | 12 | es |
dc.publication.initialPage | 3401 | es |
dc.publication.endPage | 3405 | es |
dc.contributor.funder | Ministerio de Economía y Competitividad (MINECO). España | es |