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dc.creatorPotestad Ordóñez, Francisco Eugenioes
dc.creatorTena Sánchez, Ericaes
dc.creatorChaves, Ricardoes
dc.creatorValencia Barrero, Manueles
dc.creatorAcosta Jiménez, Antonio Josées
dc.creatorJiménez Fernández, Carlos Jesúses
dc.date.accessioned2021-03-15T10:05:37Z
dc.date.available2021-03-15T10:05:37Z
dc.date.issued2020
dc.identifier.citationPotestad Ordóñez, F.E., Tena Sánchez, E., Chaves, R., Valencia Barrero, M., Acosta Jiménez, A.J. y Jiménez Fernández, C.J. (2020). Hamming-code based fault detection design methodology for block ciphers. En ISCAS 2020: IEEE International Symposium on Circuits and Systems Sevilla, España: IEEE Computer Society.
dc.identifier.isbn978-1-7281-3320-1es
dc.identifier.issn2158-1525es
dc.identifier.urihttps://hdl.handle.net/11441/106029
dc.description.abstractFault injection, in particular Differential Fault Analysis (DFA), has become one of the main methods for exploiting vulnerabilities into the block ciphers currently used in a multitude of applications. In order to minimize this type of vulnerabilities, several mechanisms have been proposed to detect this type of attacks. However, these mechanisms can have a significant cost or not adequately cover the implementations against fault attacks. In this paper a novel approach is proposed, consisting in generating the signatures of the internal state using a Hamming code. This allows to cover a larger amount of faults allowing to detect even or odd bit changes, as well as multibit and multi-byte changes, the ones that make ciphers more vulnerable to DFA attacks. As case of study, this approach has been applied to the Advanced Encryption Standard (AES) block cipher implemented on FPGA using T-boxes. The results suggest a higher fault coverage with an overhead of 16% of resource consumption and without any penalty in the frequency degradation.es
dc.description.sponsorshipMinisterio de Economía y Competitividad TEC2016-80549-Res
dc.description.sponsorshipEuropean Union FCT: UIDB/50021/2020es
dc.description.sponsorshipEuropean Union LISBOA- 01-0145-FEDER-031901 (PTDC/CCI-COM/31901/2017, HiPErBio)es
dc.formatapplication/pdfes
dc.format.extent5es
dc.language.isoenges
dc.publisherIEEE Computer Societyes
dc.relation.ispartofISCAS 2020: IEEE International Symposium on Circuits and Systems (2020).
dc.rightsAttribution-NonCommercial-NoDerivatives 4.0 Internacional*
dc.rights.urihttp://creativecommons.org/licenses/by-nc-nd/4.0/*
dc.subjectFault Attackes
dc.subjectAESes
dc.subjectCountermeasurees
dc.subjectFPGA implementationes
dc.subjectHamming Codees
dc.subjectDFAes
dc.titleHamming-code based fault detection design methodology for block cipherses
dc.typeinfo:eu-repo/semantics/conferenceObjectes
dcterms.identifierhttps://ror.org/03yxnpp24
dc.type.versioninfo:eu-repo/semantics/submittedVersiones
dc.rights.accessRightsinfo:eu-repo/semantics/openAccesses
dc.contributor.affiliationUniversidad de Sevilla. Departamento de Tecnología Electrónicaes
dc.relation.projectIDTEC2016-80549-Res
dc.relation.projectIDFCT: UIDB/50021/2020es
dc.relation.projectIDLISBOA- 01-0145-FEDER-031901 (PTDC/CCI-COM/31901/2017, HiPErBio)es
dc.relation.publisherversionhttps://ieeexplore.ieee.org/document/9180451es
dc.identifier.doi10.1109/ISCAS45731.2020.9180451es
dc.eventtitleISCAS 2020: IEEE International Symposium on Circuits and Systemses
dc.eventinstitutionSevilla, Españaes
dc.relation.publicationplaceNew York, USAes
dc.contributor.funderMinisterio de Economía y Competitividad (MINECO). Españaes
dc.contributor.funderEuropean Union (UE)es

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