A modular current-mode high-precision winner-take-all circuit

Serrano Gotarredona, María Teresa; Linares Barranco, Bernabé

doi:10.1109/82.365356

Artículo

dc.creator	Serrano Gotarredona, María Teresa	es
dc.creator	Linares Barranco, Bernabé	es
dc.date.accessioned	2020-09-30T10:12:35Z
dc.date.available	2020-09-30T10:12:35Z
dc.date.issued	1995
dc.identifier.citation	Serrano Gotarredona, M.T. y Linares Barranco, B. (1995). A modular current-mode high-precision winner-take-all circuit. IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, 42 (2), 557-560.
dc.identifier.issn	1057-7130	es
dc.identifier.uri	https://hdl.handle.net/11441/101604
dc.description.abstract	In this paper we present a Winner-Take-All (WTA) circuit realized using current-mode circuit design techniques. The operation of the WTA is based on current comparators and current mirrors. Speed and precision is determined primarily by the characteristics of the current mirror used. Using special current mirrors, resolutions below 1% and settling times below loons were simulated. The circuit remains operative with reasonable speed and precision for an input signal range wider than two decades. It requires current input signals and provides voltage output signals.	es
dc.format	application/pdf	es
dc.format.extent	4	es
dc.language.iso	eng	es
dc.publisher	IEEE Computer Society	es
dc.relation.ispartof	IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, 42 (2), 557-560.
dc.rights	Attribution-NonCommercial-NoDerivatives 4.0 Internacional	*
dc.rights.uri	http://creativecommons.org/licenses/by-nc-nd/4.0/	*
dc.title	A modular current-mode high-precision winner-take-all circuit	es
dc.type	info:eu-repo/semantics/article	es
dc.type.version	info:eu-repo/semantics/publishedVersion	es
dc.rights.accessRights	info:eu-repo/semantics/openAccess	es
dc.contributor.affiliation	Universidad de Sevilla. Departamento de Arquitectura y Tecnología de Computadores	es
dc.relation.publisherversion	https://ieeexplore.ieee.org/document/365356	es
dc.identifier.doi	10.1109/82.365356	es
dc.journaltitle	IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing	es
dc.publication.volumen	42	es
dc.publication.issue	2	es
dc.publication.initialPage	557	es
dc.publication.endPage	560	es

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