dc.creator | Zamarreño Ramos, Carlos | es |
dc.creator | Kulkarni, Raghavendra | es |
dc.creator | Silva Martínez, José | es |
dc.creator | Serrano Gotarredona, María Teresa | es |
dc.creator | Linares Barranco, Bernabé | es |
dc.date.accessioned | 2020-09-28T08:41:53Z | |
dc.date.available | 2020-09-28T08:41:53Z | |
dc.date.issued | 2013 | |
dc.identifier.citation | Zamarreño Ramos, C., Kulkarni, R., Silva Martínez, J., Serrano Gotarredona, M.T. y Linares Barranco, B. (2013). A 1.5 ns OFF/ON Switching-Time Voltage-Mode LVDS Driver/Receiver Pair for Asynchronous AER Bit-Serial Chip Grid Links With Up to 40 Times Event-Rate Dependent Power Savings. IEEE Transactions on Biomedical Circuits and Systems, 7 (5), 722-731. | |
dc.identifier.issn | 1932-4545 | es |
dc.identifier.uri | https://hdl.handle.net/11441/101518 | |
dc.description.abstract | This paper presents a low power fast ON/OFF
switchable voltage mode implementation of a driver/receiver
pair intended to be used in high speed bit-serial Low Voltage
Differential Signaling (LVDS) Address Event Representation
(AER) chip grids, where short (like 32-bit) sparse data packages
are transmitted. Voltage-Mode drivers require intrinsically half
the power of their Current-Mode counterparts and do not require
Common-Mode Voltage Control. However, for fast ON/OFF
switching a special high-speed voltage regulator is required which
needs to be kept ON during data pauses, and hence its power consumption
must be minimized, resulting in tight design constraints.
A proof-of-concept chip test prototype has been designed and
fabricated in low-cost standard 0.35 m CMOS. At mV
voltage swing with 500 Mbps serial bit rate and 32 bit events, current
consumption scales from 15.9 mA (7.7 mA for the driver and
8.2 mA for the receiver) at 10 Mevent/s rate to 406 A (343 Afor
the driver and 62.5 A for the receiver) for an event rate below
10 Kevent/s, therefore achieving a rate dependent power saving of
up to 40 times, while keeping switching times at 1.5 ns. Maximum
achievable event rate was 13.7 Meps at 638 Mbps serial bit rate.
Additionally, differential voltage swing is tunable, thus allowing
further power reductions. | es |
dc.description.sponsorship | Junta de Andalucía TIC-6091 | es |
dc.description.sponsorship | Ministerio de Economía y Competitividad TEC2009-106039-C04-01/02 | es |
dc.description.sponsorship | European Union PRI-PIMCHI-2011-0768 | es |
dc.format | application/pdf | es |
dc.format.extent | 9 | es |
dc.language.iso | eng | es |
dc.publisher | IEEE Computer Society | es |
dc.relation.ispartof | IEEE Transactions on Biomedical Circuits and Systems, 7 (5), 722-731. | |
dc.rights | Attribution-NonCommercial-NoDerivatives 4.0 Internacional | * |
dc.rights.uri | http://creativecommons.org/licenses/by-nc-nd/4.0/ | * |
dc.subject | Address event representation (AER) | es |
dc.subject | Asynchronous circuits | es |
dc.subject | Asynchronous communications | es |
dc.subject | Event-driven processing | es |
dc.subject | Low voltage differential signaling (LVDS) | es |
dc.subject | LVDS drivers | es |
dc.subject | Manchester encoding | es |
dc.subject | Neuromorphic circuits and systems | es |
dc.subject | Serial AER | es |
dc.subject | Serial interchip communication | es |
dc.title | A 1.5 ns OFF/ON Switching-Time Voltage-Mode LVDS Driver/Receiver Pair for Asynchronous AER Bit-Serial Chip Grid Links With Up to 40 Times Event-Rate Dependent Power Savings | es |
dc.type | info:eu-repo/semantics/article | es |
dcterms.identifier | https://ror.org/03yxnpp24 | |
dc.type.version | info:eu-repo/semantics/submittedVersion | es |
dc.rights.accessRights | info:eu-repo/semantics/openAccess | es |
dc.contributor.affiliation | Universidad de Sevilla. Departamento de Arquitectura y Tecnología de Computadores | es |
dc.relation.projectID | TIC-6091 | es |
dc.relation.projectID | TEC2009-106039-C04-01/02 | es |
dc.relation.projectID | PRI-PIMCHI-2011-0768 | es |
dc.relation.publisherversion | https://ieeexplore.ieee.org/document/6471789 | es |
dc.identifier.doi | 10.1109/TBCAS.2012.2232925 | es |
dc.journaltitle | IEEE Transactions on Biomedical Circuits and Systems | es |
dc.publication.volumen | 7 | es |
dc.publication.issue | 5 | es |
dc.publication.initialPage | 722 | es |
dc.publication.endPage | 731 | es |
dc.contributor.funder | Junta de Andalucía | es |
dc.contributor.funder | Ministerio de Economía y Competitividad (MINECO). España | es |
dc.contributor.funder | European Union (UE) | es |