NameGinés Arteaga, Antonio José
DepartmentElectrónica y Electromagnetismo
Knowledge areaElectrónica
Professional categoryProfesor Contratado Doctor
E-mailRequest
           
  • No. publications

    15

  • No. visits

    1267

  • No. downloads

    3379


 

Final Degree Project
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Métodos numéricos avanzados para el estudio electroestático de la unión P-N

Romero Salazar, Andrea; Ginés Arteaga, Antonio José (2023)
Final Degree Project
Final Degree Project
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Música con Plasma. Análisis, modelado y demostración de la modulación de sonido en la ruptura eléctrica del aire

Felipe García, Santiago de; López Angulo, Antonio; Ginés Arteaga, Antonio José (2021)
Presentation
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On-chip Reduced-code Static Linearity Test of Vcm-based Switching SAR ADCs Using an Incremental Analog-to-digital Converter

Feitoza, Renato S.; Barragan, Manuel J.; Ginés Arteaga, Antonio José; Mir, Salvador (Institute of Electrical and Electronics Engineers (IEEE), 2020)
This paper describes a BIST technique for the static linearity test of Vcm-based successive-approximation analog-to-digital ...
Presentation
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Static Linearity BIST for Vcm-based Switching SAR ADCs Using a Reduced-code Measurement Technique

Feitoza, Renato S.; Barragan, Manuel J.; Ginés Arteaga, Antonio José; Mir, Salvador (Institute of Electrical and Electronics Engineers (IEEE), 2020)
This work presents a reduced-code strategy for the static linearity self-testing of Vcm -based successive-approximation ...
Master's Final Project
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Analysis, modeling and design of Successive Approach Analog-Digital Converters (SARADCs) with Digital Redundancy

López Angulo, Antonio; Ginés Arteaga, Antonio José; Rueda Rueda, Adoración (2018)
Article
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Design methodology for low-jitter differential clock recovery circuits in high performance ADCs

Núñez Martínez, Juan; Ginés Arteaga, Antonio José; Peralías Macías, Eduardo; Rueda Rueda, Adoración (Springer, 2016)
This paper presents a design methodology for the simultaneous optimization of jitter and power consumption in ultra-low ...
Presentation
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A 76nW, 4kS/s 10-bit SAR ADC with offset cancellation for biomedical applications

Delgado Restituto, Manuel; Carrasco Robles, Manuel; Fiorelli, Rafaella; Ginés Arteaga, Antonio José; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2016)
This paper presents a 10-bit fully-differential rail-to-rail successive approximation (SAR) ADC designed for biomedical ...
Article
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Background Digital Calibration of Comparator Offsets in Pipeline ADCs

Ginés Arteaga, Antonio José; Peralías Macías, Eduardo; Rueda Rueda, Adoración (Institute of Electrical and Electronics Engineers, 2015)
This brief presents a low-cost digital technique for background calibration of comparator offsets in pipeline analog-to-digital ...
Article
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Closed-loop Simulation Method for Evaluation of Static Offset in Discrete-Time Comparators

Ginés Arteaga, Antonio José; Peralías Macías, Eduardo; Léger, Gildas; Rueda Rueda, Adoración (Institute of Electrical and Electronics Engineers, 2014)
This paper presents a simulation-based method for evaluating the static offset in discrete-time comparators. The proposed ...
Patent
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Procedimiento adaptativo de calibración dígital concurrente del offset en comparadores en convertidores analógico-digitales (adcs).

Ginés Arteaga, Antonio José; Peralías Macías, Eduardo José; Rueda Rueda, Adoración (Oficina Española de Patentes y Marcas , 2012)
El objeto de la presente invención es un procedimiento adaptativo para la calibración del offset de comparadores en ...
Patent
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Procedimiento adaptativo para la estimación de la inl en convertidores analógico-digitales (adcs).

Ginés Arteaga, Antonio José; Peralías Macías, Eduardo José; Rueda Rueda, Adoración (Oficina Española de Patentes y Marcas , 2012)
Procedimiento adaptativo para la estimación de la INL en convertidores analógico-digitales (ADCs).Permite caracterizar y ...
Article
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On chopper effects in discrete-time ΣΔ modulators

Léger, Gildas; Ginés Arteaga, Antonio José; Peralías Macías, Eduardo; Rueda Rueda, Adoración (Institute of Electrical and Electronics Engineers, 2010)
Analog-to-digital converters based on ΣΔ modulators are used in a wide variety of applications. Due to their inherent ...
Presentation
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Random chopping in ΣΔ modulators

Léger, Gildas; Ginés Arteaga, Antonio José; Peralías Macías, Eduardo; Rueda Rueda, Adoración (2009)
Σ∆ modulators make a clever use of oversampling and exhibit inherent monotonicity, high linearity and large dynamic range ...
Presentation
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A 2.5MHz bandpass active complex filter With 2.4MHz bandwidth for wireless communications

Villegas Calvo, José Alberto; Fiorelli Martegani, Rafaella Bianca; Ginés Arteaga, Antonio José; Doldan Lorenzo, Ricardo; Jalón, Maria Ángeles; Acosta Jiménez, Antonio José; Peralías Macías, Eduardo; Vázquez García de la Vega, Diego (2008)
This paper presents a fully differential 8thorder transconductor-based active complex filter with 2.4MHz bandwidth and ...