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Controller design for a single-phase two-cell multilevel cascade H-bridge converter
dc.creator | Vázquez Pérez, Sergio | es |
dc.creator | León Galván, José Ignacio | es |
dc.creator | Carrasco Solís, Juan Manuel | es |
dc.creator | García Franquelo, Leopoldo | es |
dc.creator | Galván Díez, Eduardo | es |
dc.creator | Sánchez Segura, Juan Antonio | es |
dc.creator | Domínguez, E. | es |
dc.date.accessioned | 2015-03-26T08:28:24Z | |
dc.date.available | 2015-03-26T08:28:24Z | |
dc.date.issued | 2008 | es |
dc.identifier.isbn | 978-1-4244-1665-3 | |
dc.identifier.uri | http://hdl.handle.net/11441/23556 | |
dc.description.abstract | In this paper is studied the single-phase two-cell multilevel cascade H-bridge power converter connected to the grid, acting as a synchronous rectifier. The power exchange process between the cells of the converter and the grid is analysed. Based on this analysis and on the power converter model the stages of the controller design process are shown. A new controller for the cascade power converter is proposed, achieving the regulation of each DC-Link capacitor voltage towards its reference. The proposed controller includes a repetitive scheme in the current tracking loop, providing low current harmonic content and almost unity power factor. Simulation results have been carried out in a 10 kVA single-phase two-cell multilevel cascade H-bridge power converter model to illustrate the good performance of the proposed controller. | en |
dc.format | application/pdf | es |
dc.language.iso | eng | es |
dc.publisher | IEEE | |
dc.relation.ispartof | International Symposium On Industrial Electronics (ISIE), 2342-2347. Cambridge, Reino Unido : IEEE | es |
dc.rights | Attribution-NonCommercial-NoDerivatives 4.0 Internacional | es |
dc.rights.uri | http://creativecommons.org/licenses/by-nc-nd/4.0/ | es |
dc.subject | Multilevel converter | en |
dc.subject | power quality | en |
dc.subject | non-linear control | en |
dc.title | Controller design for a single-phase two-cell multilevel cascade H-bridge converter | en |
dc.type | info:eu-repo/semantics/conferenceObject | es |
dcterms.identifier | https://ror.org/03yxnpp24 | |
dc.rights.accessRights | info:eu-repo/semantics/openAccess | es |
dc.contributor.affiliation | Universidad de Sevilla. Departamento de Ingeniería Electrónica | es |
dc.relation.publisherversion | 10.1109/ISIE.2008.4677116 | |
dc.identifier.idus | https://idus.us.es/xmlui/handle/11441/23556 |
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file_1.pdf | 244.6Kb | [PDF] | Ver/ | |