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Mostrando ítems 31-40 de 46
Ponencia
Neuro-Inspired Real-Time USB & PCI to AER Interfaces for Vision Processing
(IEEE, 2008-06)
Address-Event-Representation (AER) is an emergent neuromorphic interchip communication protocol that allows for real-time virtual massive connectivity between huge number neurons located on different chips. By exploiting ...
Ponencia
Test Infrastructure for Address-Event-Representation Communications
(Springer, 2005)
Address-Event-Representation (AER) is a communication protocol for transferring spikes between bio-inspired chips. Such systems may consist of a hierarchical structure with several chips that transmit spikes among them ...
Ponencia
Live Demonstration: On the distance estimation of moving targets with a Stereo-Vision AER system
(IEEE Computer Society, 2012)
Distance calculation is always one of the most important goals in a digital stereoscopic vision system. In an AER system this goal is very important too, but it cannot be calculated as accurately as we would like. This ...
Ponencia
AER Neuro-Inspired interface to Anthropomorphic Robotic Hand
(IEEE Computer Society, 2006)
Address-Event-Representation (AER) is a communication protocol for transferring asynchronous events between VLSI chips, originally developed for neuro-inspired processing systems (for example, image processing). ...
Ponencia
An AER to CAN Bridge for Spike-Based Robot Control
(Springer, 2011)
Address-Event-Representation (AER) is a bio-inspired communication protocol between chips. A set of AER sensors (retina and cochleas), processors (convolvers, WTA, mappers, …) and actuators can be found in the literature ...
Ponencia
An Approach to Distance Estimation with Stereo Vision Using Address-Event-Representation
(Springer, 2011)
Image processing in digital computer systems usually considers the visual information as a sequence of frames. These frames are from cameras that capture reality for a short period of time. They are renewed and transmitted ...
Ponencia
Live demonstration: Neuro-inspired system for realtime vision tilt correction
(IEEE Computer Society, 2010)
Correcting digital images tilt needs huge quantities of memory, high computational resources, and use to take a considerable amount of time. This demonstration shows how a spikes-based silicon retina dynamic vision ...
Ponencia
Análisis a Bajo Nivel de Procesadores Superescalares Reales
(Universidad de Alcalá de Henares. Servicio de Publicaciones, 2000)
En esta ponencia-demo se presenta una práctica donde se analiza la influencia en el tiempo de ejecución de algunas optimizaciones sobre el código máquina para procesadores reales (familia Intel Pentium). Se propone el ...
Ponencia
LVDS Serial AER Link performance
(IEEE Computer Society, 2007)
Address-Event-Representation (AER) is a communication protocol for transferring asynchronous events between VLSI chips, originally developed for bio-inspired processing systems (for example, image processing). Such systems ...
Ponencia
A LVDS Serial AER Link
(IEEE Computer Society, 2007)
Address-Event-Representation (AER) is a communication protocol for transferring asynchronous events between VLSI chips, originally developed for bio-inspired processing systems (for example, image processing). Such systems ...