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Artículo
A Binaural Neuromorphic Auditory Sensor for FPGA: A Spike Signal Processing Approach
(IEEE Computer Society, 2017)
This paper presents a new architecture, design flow, and field-programmable gate array (FPGA) implementation analysis of a neuromorphic binaural auditory sensor, designed completely in the spike domain. Unlike digital ...
Ponencia
Entrenamiento de la creatividad y la innovación en la ingeniería de computadores basándose en la metodología de aprendizaje por proyectos
(AENUI: Asociación de Enseñantes Universitarios de Informática, 2011)
En los estudios de Ingeniería normalmente se instruye en competencias sobre diseño, en las que es fundamental conocer las tecnologías y herramientas correspondientes a la materia en que el alumno se especializa. Los problemas ...
Ponencia
LVDS Serial AER Link performance
(IEEE Computer Society, 2007)
Address-Event-Representation (AER) is a communication protocol for transferring asynchronous events between VLSI chips, originally developed for bio-inspired processing systems (for example, image processing). Such systems ...
Ponencia
A LVDS Serial AER Link
(IEEE Computer Society, 2007)
Address-Event-Representation (AER) is a communication protocol for transferring asynchronous events between VLSI chips, originally developed for bio-inspired processing systems (for example, image processing). Such systems ...
Ponencia
Image convolution using a probabilistic mapper on USB-AER board
(IEEE Computer Society, 2008)
In this demo we propose a method for computing real time convolution on AER images. For that we use signed events. The AER events produced on an AER retina or an image/video to AER conversor, are processed using ...