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Ponencia
On the AER Convolution Processors for FPGA
(IEEE Computer Society, 2010)
Image convolution operations in digital computer systems are usually very expensive operations in terms of resource consumption (processor resources and processing time) for an efficient Real-Time application. In these ...
Ponencia
FPGA Implementations Comparison of Neuro-cortical Inspired Convolution Processors for Spiking Systems
(Springer, 2009)
Image convolution operations in digital computer systems are usually very expensive operations in terms of resource consumption (processor resources and processing time) for an efficient Real-Time application. In ...
Artículo
A Binaural Neuromorphic Auditory Sensor for FPGA: A Spike Signal Processing Approach
(IEEE Computer Society, 2017)
This paper presents a new architecture, design flow, and field-programmable gate array (FPGA) implementation analysis of a neuromorphic binaural auditory sensor, designed completely in the spike domain. Unlike digital ...
Ponencia
Diseño de material específico docente para el aprendizaje de microcontroladores y sistemas USB
(AENUI: Asociación de Enseñantes Universitarios de Informática, 2011)
En la enseñanza en profundidad y especializada en materias de tipo informática nos encontramos con que los contenidos no paran de crecer y cada vez son más difíciles de abarcar. Por otra parte hay que empezar a pensar ...
Artículo
Ponencia
Address-Event based Platform for Bio-inspired Spiking Systems
(SPIE Digital LIbrary, 2007-05)
Address Event Representation (AER) is an emergent neuromorphic interchip communication protocol that allows a real-time virtual massive connectivity between huge number neurons, located on different chips. By exploiting ...
Artículo
A spiking neural network for real-time Spanish vowel phonemes recognition
(Elsevier, 2017)
This paper explores neuromorphic approach capabilities applied to real-time speech processing. A spiking recognition neural network composed of three types of neurons is proposed. These neurons are based on an integrative ...
Ponencia
LVDS Serial AER Link performance
(IEEE Computer Society, 2007)
Address-Event-Representation (AER) is a communication protocol for transferring asynchronous events between VLSI chips, originally developed for bio-inspired processing systems (for example, image processing). Such systems ...
Ponencia
A LVDS Serial AER Link
(IEEE Computer Society, 2007)
Address-Event-Representation (AER) is a communication protocol for transferring asynchronous events between VLSI chips, originally developed for bio-inspired processing systems (for example, image processing). Such systems ...
Ponencia
Image convolution using a probabilistic mapper on USB-AER board
(IEEE Computer Society, 2008)
In this demo we propose a method for computing real time convolution on AER images. For that we use signed events. The AER events produced on an AER retina or an image/video to AER conversor, are processed using ...