Buscar
Mostrando ítems 1-10 de 16
Ponencia
On the AER Convolution Processors for FPGA
(IEEE Computer Society, 2010)
Image convolution operations in digital computer systems are usually very expensive operations in terms of resource consumption (processor resources and processing time) for an efficient Real-Time application. In these ...
Ponencia
FPGA Implementations Comparison of Neuro-cortical Inspired Convolution Processors for Spiking Systems
(Springer, 2009)
Image convolution operations in digital computer systems are usually very expensive operations in terms of resource consumption (processor resources and processing time) for an efficient Real-Time application. In ...
Artículo
A Binaural Neuromorphic Auditory Sensor for FPGA: A Spike Signal Processing Approach
(IEEE Computer Society, 2017)
This paper presents a new architecture, design flow, and field-programmable gate array (FPGA) implementation analysis of a neuromorphic binaural auditory sensor, designed completely in the spike domain. Unlike digital ...
Ponencia
Diseño de material específico docente para el aprendizaje de microcontroladores y sistemas USB
(AENUI: Asociación de Enseñantes Universitarios de Informática, 2011)
En la enseñanza en profundidad y especializada en materias de tipo informática nos encontramos con que los contenidos no paran de crecer y cada vez son más difíciles de abarcar. Por otra parte hay que empezar a pensar ...
Artículo
Ponencia
Address-Event based Platform for Bio-inspired Spiking Systems
(SPIE Digital LIbrary, 2007-05)
Address Event Representation (AER) is an emergent neuromorphic interchip communication protocol that allows a real-time virtual massive connectivity between huge number neurons, located on different chips. By exploiting ...
Ponencia
Using FPGA for visuo-motor control with a silicon retina and a humanoid robot
(IEEE Computer Society, 2007)
The address-event representation (AER) is a neuromorphic communication protocol for transferring asynchronous events between VLSI chips. The event information is transferred using a high speed digital parallel bus. ...
Ponencia
A SpiNNaker Application: Design, Implementation and Validation of SCPGs
(Springer, 2017)
In this paper, we present the numerical results of the implementation of a Spiking Central Pattern Generator (SCPG) on a SpiNNaker board. The SCPG is a network of current-based leaky integrateand- fire (LIF) neurons, ...
Tesis Doctoral
Una aportación al procesado neuromórfico de audio basado en modelos pulsantes. Desde la cóclea a la percepción auditiva
(2013-07-12)
El objetivo principal de esta tesis es abordar un nuevo sistema de procesado neuromórfico de audio basado en la representación pulsante de la información. Para ello se pretende desarrollar un nuevo sensor neuromórfico de ...
Ponencia
Spike-based VITE control with Dynamic Vision Sensor applied to an Arm Robot.
(IEEE Computer Society, 2014)
Spike-based motor control is very important in the field of robotics and also for the neuromorphic engineering community to bridge the gap between sensing / processing devices and motor control without losing the spike ...