Listar Arquitectura y Tecnología de Computadores por autor "Serrano Gotarredona, Rafael"
Mostrando ítems 1-7 de 7
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Ponencia
AER Building Blocks for Multi-Layer Multi-Chip Neuromorphic Vision Systems
(Neural Information Processing Systems Foundation, 2005)A 5-layer neuromorphic vision processor whose components communicate spike events asychronously using the ...
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Ponencia
An AER Contrast Retina with On-Chip Calibration
(IEEE Computer Society, 2007)We present a contrast retina microchip that provides its output as an AER (Address Event Representation) stream. Contrast ...
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Ponencia
High-speed image processing with AER-based components
(IEEE Computer Society, 2006)A high speed sample image processing application using AER-based components is presented. The setup objective is to ...
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Ponencia
LVDS interface for AER links with burst mode operation capability
(IEEE Computer Society, 2008)This paper presents the design and simulation of a serial AER LVDS communication link. It converts data from classical ...
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Ponencia
LVDS Serial AER Link performance
(IEEE Computer Society, 2007)Address-Event-Representation (AER) is a communication protocol for transferring asynchronous events between VLSI chips, ...
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Artículo
On Real-Time AER 2-D Convolutions Hardware for Neuromorphic Spike-Based Cortical Processing
(IEEE Computer Society, 2008)In this paper, a chip that performs real-time image convolutions with programmable kernels of arbitrary shape is ...
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Ponencia
Spike Events Processing for Vision Systems
(IEEE Computer Society, 2007)In this paper we briefly summarize the fundamental properties of spike events processing applied to artificial vision ...