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Artículo
Ultralow-power processing array for image enhancement and edge detection
(Institute of Electrical and Electronics Engineers, 2012)
This paper presents a massively parallel processing array designed for the 0.13-μm 1.5-V standard CMOS base process of a commercial 3-D through-silicon via stack. The array, which will constitute one of the fundamental ...
Artículo
All-MOS implementation of RC networks for time-controlled Gaussian spatial filtering
(Wiley-Blackwell, 2012)
This paper addresses the design and VLSI implementation of MOS-based RC networks capable of performing time-controlled Gaussian filtering. In these networks, all the resistors are substituted one by one by a single MOS ...