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Ponencia
A power efficient neural spike recording channel with data bandwidth reduction
Autor/es | Rodríguez Pérez, Alberto
Ruiz Amaya, Jesús Rodríguez Rodríguez, José Antonio Delgado Restituto, Manuel Rodríguez Vázquez, Ángel Benito |
Departamento | Universidad de Sevilla. Departamento de Electrónica y Electromagnetismo |
Fecha de publicación | 2011 |
Fecha de depósito | 2019-11-06 |
Publicado en |
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ISBN/ISSN | 978-1-4244-9473-6 0271-4302 |
Resumen | This paper presents a mixed-signal neural spike recording channel which features, as an added value, a simple and low-power data compression mechanism. The channel uses a band-limited differential low noise amplifier and ... This paper presents a mixed-signal neural spike recording channel which features, as an added value, a simple and low-power data compression mechanism. The channel uses a band-limited differential low noise amplifier and a binary search data converter, together with other digital and analog blocks for control, programming and spike characterization. The channel offers a self-calibration operation mode and it can be configured both for signal tracking (to raw digitize the acquired neural waveform) and feature extraction (to build a first-order PWL approximation of the spikes). The prototype has been fabricated in a standard CMOS 0.13μm and occupies 400μm×400μm. The overall power consumption of the channel during signal tracking is 2.8μW and increases to 3.0μW average when the feature extraction operation mode is programmed. |
Identificador del proyecto | TEC2009-08447
TIC-02818 |
Cita | Rodríguez Pérez, A., Ruiz Amaya, J., Rodríguez Rodríguez, J.A., Delgado Restituto, M. y Rodríguez Vázquez, Á.B. (2011). A power efficient neural spike recording channel with data bandwidth reduction. En IEEE International Symposium of Circuits and Systems (ISCAS) (1704-1707), Río de Janeiro, Brasil: Institute of Electrical and Electronics Engineers. |
Ficheros | Tamaño | Formato | Ver | Descripción |
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A Power Efficient Neural Spike.pdf | 385.6Kb | [PDF] | Ver/ | |