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dc.creatorMuñoz-Quijada, Maríaes
dc.creatorSánchez-Barea, Samueles
dc.creatorVela-Calderón, Danieles
dc.creatorGuzmán-Miranda, Hipólitoes
dc.date.accessioned2019-04-10T14:53:49Z
dc.date.available2019-04-10T14:53:49Z
dc.date.issued2019-01
dc.identifier.citationMuñoz-Quijada, M., Sánchez-Barea, S., Vela-Calderón, D. y Guzmán-Miranda, H. (2019). Fine-grain circuit hardening through VHDL datatype substitution. Electronics, 8 (1)
dc.identifier.urihttps://hdl.handle.net/11441/85475
dc.description.abstractRadiation effects can induce, amongst other phenomena, logic errors in digital circuits and systems. These logic errors corrupt the states of the internal memory elements of the circuits and can propagate to the primary outputs, affecting other onboard systems. In order to avoid this, Triple Modular Redundancy is typically used when full robustness against these phenomena is needed. When full triplication of the complete design is not required, selective hardening can be applied to the elements in which a radiation-induced upset is more likely to propagate to the main outputs of the circuit. The present paper describes a new approach for selectively hardening digital electronic circuits by design, which can be applied to digital designs described in the VHDL Hardware Description Language. When the designer changes the datatype of a signal or port to a hardened type, the necessary redundancy is automatically inserted. The automatically hardening features have been compiled into a VHDL package, and have been validated both in simulation and by means of fault injection.es
dc.description.sponsorshipMinisterio de Economía y Competitividad ESP2015-68245-C4-2-Pes
dc.description.sponsorshipComisión Europea ID 687220.es
dc.formatapplication/pdfes
dc.language.isoenges
dc.publisherMDPI AGes
dc.rightsAttribution-NonCommercial-NoDerivatives 4.0 Internacional*
dc.rights.urihttp://creativecommons.org/licenses/by-nc-nd/4.0/*
dc.subjectHardening by designes
dc.subjectRadiation hardeninges
dc.subjectSelective hardeninges
dc.subjectTMRes
dc.subjectVHDLes
dc.titleFine-grain circuit hardening through VHDL datatype substitutiones
dc.typeinfo:eu-repo/semantics/articlees
dcterms.identifierhttps://ror.org/03yxnpp24
dc.type.versioninfo:eu-repo/semantics/publishedVersiones
dc.rights.accessRightsinfo:eu-repo/semantics/openAccesses
dc.contributor.affiliationUniversidad de Sevilla. Departamento de Ingeniería Electrónicaes
dc.relation.projectIDESP2015-68245-C4-2-Pes
dc.relation.projectIDID 687220es
dc.relation.publisherversionhttps://www.mdpi.com/2079-9292/8/1/24es
dc.identifier.doi10.3390/electronics8010024es
dc.contributor.groupUniversidad de Sevilla. TIC192: Ingeniería Electrónicaes
idus.format.extent18es
dc.journaltitleElectronicses
dc.publication.volumen8es
dc.publication.issue1es

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