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The Stochastic Loss of Spikes in Spiking Neural P Systems: Design and Implementation of Reliable Arithmetic Circuits
dc.creator | Xu, Zihan | |
dc.creator | Cavaliere, Matteo | |
dc.creator | An, Pei | |
dc.creator | Vrudhula, Sarma | |
dc.creator | Cao, Yu | |
dc.date.accessioned | 2016-01-29T10:13:53Z | |
dc.date.available | 2016-01-29T10:13:53Z | |
dc.date.issued | 2014 | |
dc.identifier.isbn | 978-84-940056-4-0 | es |
dc.identifier.uri | http://hdl.handle.net/11441/33582 | |
dc.description.abstract | Spiking neural P systems (in short, SN P systems) have been introduced as computing devices inspired by the structure and functioning of neural cells. The presence of unreliable components in SN P systems can be considered in many di erent aspects. In this paper we focus on two types of unreliability: the stochastic delays of the spiking rules and the stochastic loss of spikes. We propose the implementation of elementary SN P systems with DRAM-based CMOS circuits that are able to cope with these two forms of unreliability in an e cient way. The constructed bio-inspired circuits can be used to encode basic arithmetic modules. | es |
dc.format | application/pdf | es |
dc.language.iso | eng | es |
dc.publisher | Fénix Editora | es |
dc.relation.ispartof | Proceedings of the Twelfth Brainstorming Week on Membrane Computing, 353-373. Sevilla, E.T.S. de Ingeniería Informática, 3-7 de Febrero, 2014, | es |
dc.rights | Attribution-NonCommercial-NoDerivatives 4.0 Internacional | * |
dc.rights.uri | http://creativecommons.org/licenses/by-nc-nd/4.0/ | * |
dc.title | The Stochastic Loss of Spikes in Spiking Neural P Systems: Design and Implementation of Reliable Arithmetic Circuits | es |
dc.type | info:eu-repo/semantics/conferenceObject | es |
dc.type.version | info:eu-repo/semantics/publishedVersion | es |
dc.rights.accessRights | info:eu-repo/semantics/openAccess | |
dc.identifier.idus | https://idus.us.es/xmlui/handle/11441/33582 |
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12bwmc_supplementary_353_SNP_i ... | 718.0Kb | [PDF] | Ver/ | |