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dc.creatorNápoles Luengo, Javier
dc.creatorWatson, A. J.
dc.creatorPadilla, José J.
dc.creatorLeón Galván, José Ignacio
dc.creatorGarcía Franquelo, Leopoldo
dc.creatorAguirre Echanove, Miguel Ángel
dc.date.accessioned2015-03-26T11:37:46Z
dc.date.available2015-03-26T11:37:46Z
dc.date.issued2013-05
dc.identifier.issn755-4535es
dc.identifier.urihttp://hdl.handle.net/11441/23598
dc.description.abstractMultilevel converters have received increased interest recently as a result of their ability to generate high quality output waveforms with a low switching frequency. This makes them very attractive for high power applications. A Cascaded HBridge converter is a multilevel topology which is formed from the series connection of H-Bridge cells. Optimized pulse width modulation techniques such as Selective Harmonic Elimination (SHE-PWM) or Selective Harmonic Mitigation (SHM-PWM) are capable of pre-programming the harmonic profile of the output waveform over a range of modulation indices. Such modulation methods may however not perform optimally if the DC links of the Cascaded H-Bridge Converter are not balanced. This paper presents a new SHM-PWM control strategy which is capable of meeting grid codes even under non-equal DC link voltages. The method is based on the interpolation of different sets of angles obtained for specific situations of imbalance. Both simulation and experimental results are presented to validate the proposed control method.es
dc.formatapplication/pdfes
dc.language.isoenges
dc.relation.ispartofIET Power Electronics, 7(4), 924 - 932es
dc.rightsAttribution-NonCommercial-NoDerivatives 4.0 Internacional*
dc.rights.urihttp://creativecommons.org/licenses/by-nc-nd/4.0/*
dc.subjectHarmonic distortionen
dc.subjectmultilevel systemsen
dc.subjectoptimization methodsen
dc.subjectpulse width modulation convertersen
dc.titleSelective Harmonic Mitigation Technique for Cascaded H-Bridge Converters With Nonequal DC Link Voltageses
dc.typeinfo:eu-repo/semantics/articlees
dcterms.identifierhttps://ror.org/03yxnpp24
dc.rights.accessRightsinfo:eu-repo/semantics/openAccesses
dc.contributor.affiliationUniversidad de Sevilla. Departamento de Ingeniería Electrónicaes
dc.relation.publisherversion10.1049/iet-pel.2013.0315es
dc.identifier.idushttps://idus.us.es/xmlui/handle/11441/23598

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Attribution-NonCommercial-NoDerivatives 4.0 Internacional
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