Artículo
Fully differential implementation of a delta-sigma modulator based on the pseudo-pseudo differential technique
Autor/es | Cabrera Bernal, Elena
Muñoz Chavero, Fernando ![]() ![]() ![]() ![]() ![]() ![]() Torralba Silgado, Antonio Jesús ![]() ![]() ![]() ![]() ![]() ![]() ![]() Luján Martínez, Clara Isabel ![]() ![]() ![]() ![]() ![]() ![]() ![]() |
Departamento | Universidad de Sevilla. Departamento de Ingeniería Electrónica |
Fecha de publicación | 2019-02 |
Fecha de depósito | 2023-11-09 |
Resumen | Flicker noise and distortion are the main limitations in biomedical applications, especially for Switched Capacitor implementations, where the flicker noise is folded into the signal band. To remove the flicker noise and ... Flicker noise and distortion are the main limitations in biomedical applications, especially for Switched Capacitor implementations, where the flicker noise is folded into the signal band. To remove the flicker noise and increase the linearity, the Pseudo-Pseudo Differential (P2D) technique has been proposed, where a single-ended signal is processed in a differential way. This paper presents the first silicon implementation of a second order Comparator-Based Switched-Capacitor (CBSC) delta-sigma modulator based on a variation of the P2D technique. Experimental results in a standard 180 nm CMOS technology show an improvement of 10 dB in the Peak SNDR, 5 dB in the DR, and 9 dB in the SFDR over its pseudo differential counterpart, which is the preferred differential implementation for CBSC circuits. Moreover, it is achieved with a reduction in the power consumption. |
Agencias financiadoras | Spanish Ministry of Economy and Competitiveness under the project TEC2015-71072-C3-3-R |
Identificador del proyecto | TEC2015-71072-C3-3-R
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Ficheros | Tamaño | Formato | Ver | Descripción |
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AEU_Int.JEC_P2D_SDM_Rev291118.pdf | 6.943Mb | ![]() | Ver/ | Versión aceptada del articulo, previo a maquetación ... |
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