Capítulo de Libro
Achieving Energy Efficiency in Analogue and Mixed Signal Integrated Circuit Design
Autor/es | López Morillo, Enrique
Márquez Lasso, Fernando J. Sánchez Rodríguez, T. Luján Martínez, Clara Isabel Muñoz Chavero, Fernando |
Departamento | Universidad de Sevilla. Departamento Ingeniería Electrónica |
Fecha de publicación | 2012-04 |
Fecha de depósito | 2023-06-22 |
Publicado en |
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ISBN/ISSN | 978-953-51-0482-7 978-953-51-5610-9 |
Resumen | Wireless communications are one of the major successes of the engineering over the past two decades. The progress made in this area has not only produced a huge technological growth, but also a great impact at social and ... Wireless communications are one of the major successes of the engineering over the past two decades. The progress made in this area has not only produced a huge technological growth, but also a great impact at social and economical level. In fact, the possibility of being connected anywhere at any time has radically changed people habits. The evolution of wireless communications is obviously linked to the power consumption of devices, which also continues increasing due to the growing amount of data and transmission speed required by the new communication standards. In contrast, the energy available in portable batteries does not grow at the same rate, improving only their capacity in a 10% every two years (Shahab, 2010). This leads to an increasingly gap between power needs and battery capacity. Therefore, energy efficiency of electronics systems has become a crucial factor to maximize the lifetime of the available batteries and one of the most important research topics in integrated circuits design in recent years. The increase in power consumption is less dramatic for the digital domain, since it is partially compensated, as the technology scales-down, by the reduction of the supply voltage and the geometrical dimensions of a single device. The main reason for decreasing the supply voltage in modern CMOS technology is to avoid the possible breakdown of the transistors due to the extremely thin oxide. For a CMOS logic gate, e.g. an inverter, the simplest logic cell, the power consumption can be expressed as: P = 𝐶˪ ⋅ Vdd2・ f where CL is the load capacitor at the output of the inverter, Vdd is the supply voltage and f is the operating frequency. Despite of the ever-increasing working speed, the power consumption in CMOS logic circuits is reduced as the supply voltage and geometry sizes scale down. For instance, the power consumption of microprocessors is reduced in a 50% for each technology generation if the supply voltage scales down in a 30% (Bokar, 1999) and according to Gene’s law, the power dissipation in embedded DSP processors will be decreased by a half every 18 months. As it will be explained later, this relative “low cost” of digital computation in terms of power dissipation, supports the idea of maximizing the digitization level of an electronic system not only to dismiss the fabrication costs but also as a way of reducing its power consumption. The System-On-Chip (SoC) trend is the main cause for the analogue and mixed-signal and digital integrated circuits (ICs) to be fabricated on the same wafer. This fact eventually requires the analogue and mixed-signal ICs to be fabricated in modern CMOS technologies to save cost. However, several challenges are encountered in the scaling-down of the CMOS technologies for analogue designs with not much clear advantages (Yao et al. 2006). The threshold voltage is not scaled as aggressively as the supply voltage to avoid leakage current in transistors. As a consequence, the available signal swing is lower and a reduction of the noise of the circuit to maintain the same dynamic range is required. Reducing thermal noise increases the power consumption of analogue and mixed-signal circuitry. Particularly, in discrete time applications, reducing circuit noise means increasing the capacitances which results in higher power consumption in order to maintain the same operation speed. Additionally, as technologies are scaled down, the output resistance of the MOS transistors decreases resulting in lower op-amp gain. In order to increase the gain, it is required to use either cascode transistors or cascade amplifiers, increasing the complexity of the circuits. These solutions worsen the swing problems and increase the power consumption. The analogue-to-digital (A/D) converter is one of the most important and power consuming building blocks in modern electronics systems. Moreover, A/D converter (ADC) requirements tend to be more stringent as the analogue functionality is moved to the digital domain. In recent years, the demand of more and more performance (speed and/or resolution) within a limited energy budget has pushed the IC research community to put a huge effort into increasing the energy efficiency of the ADCs. For instance, data collected from the literature over the last years indicate that the power efficiency of ADCs has improved by a factor of two every two years (Murmann, 2008), allowing some designs to become portable, such as those for biomedical applications. Due to this fact, a special attention to ADC architectures will be taken in some sections of this chapter, as they are the most limiting blocks in recent systems. In portable bio-signals acquisition micro-systems, the power consumption requirements are taken to the extreme. For instance, medical implant devices, such as modern pacemakers, require extremely low power consumption (about 10-40 μW) in order to operate up to 10 years or more using a small non-rechargeable battery (Yeknami et al., 2010). In wearable electronics for biomedical monitoring applications, extreme miniaturization is required and this will limit the battery size and power draw. Wearable electroencephalography (EEG) is a good example of such a power-limited system. EEG records the voltage between electrodes placed on the scalp and provides a non-invasive interface to the brain. Discrete, lightweight and comfortable devices are essential for user acceptance in applications such as epilepsy diagnosis (Casson & Rodriguez-Villegas, 2011). Long-term EEG monitoring of patients in their daily environment is generally required for epilepsy diagnosis. As these types of medical tests can take long periods of time, ultra-low power and miniaturized electronics systems need to be developed. Another interesting arising application is the Energy Autonomous Sensors (EAS) which will represent a revolution in the use of wireless technologies, such as wireless sensor networks, in the ambient intelligence paradigms. Exploiting this continuously improving energy efficiency and advances in energy harvesting, miniaturized battery-less sensors that do not need to be recharged for their whole operational life are becoming possible nowadays (Belleville et al. 2010). In the second section of the chapter, we give a summary on the most common techniques that have been used by the IC research community in the last years to reduce the power consumption in analogue and mixed signal circuits. Several references to relevant works where each technique is detailed are provided. The following four general categories have been considered to classify the presented techniques: * Biasing point optimization. * Digitally assisted techniques. * Analogue circuitry simplification. * Efficient use of biasing. The authors’ main contribution in this chapter is described in the third section. Some of the techniques commented on section two will be illustrated with some actual designs, a micropower channel filter for an Ultra Low Power Bluetooth (ULPBT) receiver and a compact continuous time (CT) Sigma Delta (ΣΔ) modulator for a sensor interface powered by a passive Radio Frequency Identification (RFID) front-end. |
Agencias financiadoras | Spanish Ministry of Science and Technology and the Andalusian Regional Government under Project TEC2010-21563-C02-02 Spanish Ministry of Science and Technology and the Andalusian Regional Government under Project TIC-6323-2011 |
Identificador del proyecto | TEC2010-21563-C02-02
TIC-6323-2011 |
Cita | López Morillo, E., Márquez Lasso, F.J.,...,Muñoz Chavero, F. (2012). Achieving Energy Efficiency in Analogue and Mixed Signal Integrated Circuit Design. En Energy Efficiency in Communications and Networks (pp. 23-46). London: InTech. |