ListarArtículos (Arquitectura y Tecnología de Computadores) por materia "Low voltage differential signaling (LVDS)"
Mostrando ítems 1-2 de 2
-
Artículo
A 1.5 ns OFF/ON Switching-Time Voltage-Mode LVDS Driver/Receiver Pair for Asynchronous AER Bit-Serial Chip Grid Links With Up to 40 Times Event-Rate Dependent Power Savings
(IEEE Computer Society, 2013)This paper presents a low power fast ON/OFF switchable voltage mode implementation of a driver/receiver pair intended ...
-
Artículo
An Instant-Startup Jitter-Tolerant Manchester- Encoding Serializer/Deserializer Scheme for Event-Driven Bit-Serial LVDS Interchip AER Links
(IEEE Computer Society, 2011)This paper presents a serializer/deserializer scheme for asynchronous address event representation (AER) bit-serial interchip ...