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Listar Artículos (Arquitectura y Tecnología de Computadores) por autor "Zamarreño Ramos, Carlos"
Mostrando ítems 1-4 de 4
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Artículo
A 1.5 ns OFF/ON Switching-Time Voltage-Mode LVDS Driver/Receiver Pair for Asynchronous AER Bit-Serial Chip Grid Links With Up to 40 Times Event-Rate Dependent Power Savings
Zamarreño Ramos, Carlos; Kulkarni, Raghavendra; Silva Martínez, José; Serrano Gotarredona, María Teresa; Linares Barranco, Bernabé (IEEE Computer Society, 2013)This paper presents a low power fast ON/OFF switchable voltage mode implementation of a driver/receiver pair intended ...
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Artículo
A 32 x 32 Pixel Convolution Processor Chip for Address Event Vision Sensors With 155 ns Event Latency and 20 Meps Throughput
Camuñas Mesa, Luis Alejandro; Acosta Jiménez, Antonio José; Zamarreño Ramos, Carlos; Serrano Gotarredona, María Teresa; Linares Barranco, Bernabé (IEEE Computer Society, 2011)This paper describes a convolution chip for event-driven vision sensing and processing systems. As opposed to conventional ...
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Artículo
An Event-Driven Multi-Kernel Convolution Processor Module for Event-Driven Vision Sensors
Camuñas Mesa, Luis Alejandro; Zamarreño Ramos, Carlos; Linares Barranco, Alejandro; Acosta Jiménez, Antonio José; Serrano Gotarredona, María Teresa; Linares Barranco, Bernabé (IEEE Computer Society, 2012)Event-Driven vision sensing is a new way of sensing visual reality in a frame-free manner. This is, the vision sensor (camera) ...
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Artículo
An Instant-Startup Jitter-Tolerant Manchester- Encoding Serializer/Deserializer Scheme for Event-Driven Bit-Serial LVDS Interchip AER Links
Zamarreño Ramos, Carlos; Serrano Gotarredona, María Teresa; Linares Barranco, Bernabé (IEEE Computer Society, 2011)This paper presents a serializer/deserializer scheme for asynchronous address event representation (AER) bit-serial interchip ...