Arquitectura y Tecnología de Computadores: Envíos recientes
Mostrando ítems 61-80 de 579
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Live Demonstration: Neuromorphic Sensory Integration for Combining Sound Source Localization and Collision Avoidance
(IEEE Xplore, 2020-10)The brain is able to solve complex tasks in real time by combining different sensory cues with previously acquired knowledge. ...
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Artículo
EdgeDRNN: Recurrent Neural Network Accelerator for Edge Inference
(IEEE Xplore, 2020-12)Low-latency, low-power portable recurrent neural network (RNN) accelerators offer powerful inference capabilities for ...
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Two-hidden-layer feed-forward networks are universal approximators: A constructive approach
(ScienceDirect, 2020-11)It is well-known that artificial neural networks are universal approximators. The classical existence result proves that, ...
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Ponencia
EdgeDRNN: Enabling Low-latency Recurrent Neural Network Edge Inference
(IEEE Xplore, 2020-09)This paper presents a Gated Recurrent Unit (GRU) based recurrent neural network (RNN) accelerator called Edge-DRNN designed ...
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AER Synthetic Generation in Hardware for Bio-inspired Spiking Systems
(SPIE Digital Library, 2005-05)Address Event Representation (AER) is an emergent neuromorphic interchip communication protocol that allows for real-time ...
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Utilizando los pilares del Pensamiento Computacional durante la vuelta a las clases presenciales: Reporte de experiencia desde Educación Primaria
(Sociedade Brasileira de Computação, 2022-11)Este artículo presenta los resultados de la aplicación de una yincana realizada en dos etapas con miras a la adaptación ...
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Designing and evaluating a wearable device for affective state level classification using machine learning techniques
(Elsevier, 2023-06)The emotional or affective state has a direct impact not only on personal life, but also in the field of work, sports, ...
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ROM-based FSM implementation using input multiplexing in FPGA devices
(IET Digital Library, 2004-09)A new approach for ROM implementation of finite state machines (FSMs) is proposed, based on the selection of a subset of ...
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Ponencia
Opportunities and Risks of the Information and Communication Technologies for Users with Special Needs
(IEEE, 2003-01)The fast developing of information and communication technologies has aroused the hope of P new society in which all people ...
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On Synthetic AER Generation
(IEEE, 2004-05)In this paper several software methods for generating synthetic AER streams from images stored in a computer's memory are ...
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Performance study of synthetic AER generation on CPUs for Real-Time Video based on Spikes
(ACM Digital Library, 2009-07)Address-Event-Representation (AER) is a neuromorphic interchip communication protocol that allows for real-time virtual ...
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PCI to AER Hardware/Software interface for Real- Time Vision processing
(IEEE, 2005-06)In this paper we present a mechanism that allows the coprocessing of video in real-time based into Address-Event-Representation ...
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Address-event-representation tools
(Institute of Neuromorphic Engineering, 2006) -
Ponencia
Neuro-Inspired Real-Time USB & PCI to AER Interfaces for Vision Processing
(IEEE, 2008-06)Address-Event-Representation (AER) is an emergent neuromorphic interchip communication protocol that allows for real-time ...
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Artículo
Chrono-Scheduling; a simplified dynamic scheduling algorithm for timing predictable processors
(World Scientific Connecting Great MInds, 2009)We propose a simpler and latency-reduced instruction scheduler, called chronoscheduling algorithm, which avoids large and ...
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Ponencia
AER image filtering
(SPIE Digital LIbrary, 2007-05)Address Event Representation (AER) is an emergent neuromorphic interchip communication protocol that allows realtime virtual ...
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Address-Event based Platform for Bio-inspired Spiking Systems
(SPIE Digital LIbrary, 2007-05)Address Event Representation (AER) is an emergent neuromorphic interchip communication protocol that allows a real-time ...
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Ponencia
Software Generation of Address-Event-Representation for Interchip Images Communications
(IEEE, 2002-11)Address-Event-Representation (AER) is a communications protocol for transferring images between chips, originally developed ...
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Ponencia
ROM-Based Finite State Machine Implementation in Low Cost FPGAs
(IEE, 2007-06)This work presents a technique for the resource optimization of input multiplexed ROM-based Finite State Machines. This ...
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Ponencia
Universal access to mobile telephony as a way to enhance the autonomy of elderly people
(ACM Digital Library, 2001-05)The rise of mobile telephony has opened a vast diversity of new opportunities for older people with different levels of ...