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Mostrando ítems 1-10 de 11
Ponencia
On the AER Convolution Processors for FPGA
(IEEE Computer Society, 2010)
Image convolution operations in digital computer systems are usually very expensive operations in terms of resource consumption (processor resources and processing time) for an efficient Real-Time application. In these ...
Ponencia
AER tools for Communications and Debugging
(IEEE Computer Society, 2006)
Address-event-representation (AER) is a communications protocol for transferring spikes between bio-inspired chips. Such systems may consist of a hierarchical structure with several chips that transmit spikes among them ...
Ponencia
FPGA Implementations Comparison of Neuro-cortical Inspired Convolution Processors for Spiking Systems
(Springer, 2009)
Image convolution operations in digital computer systems are usually very expensive operations in terms of resource consumption (processor resources and processing time) for an efficient Real-Time application. In ...
Ponencia
Visual Spike-based Convolution Processing with a Cellular Automata Architecture
(IEEE Computer Society, 2010)
this paper presents a first approach for implementations which fuse the Address-Event-Representation (AER) processing with the Cellular Automata using FPGA and AER-tools. This new strategy applies spike-based ...
Ponencia
An AER Spike-Processing Filter Simulator and Automatic VHDL Generator Based on Cellular Automata
(Springer, 2011)
Spike-based systems are neuro-inspired circuits implementations traditionally used for sensory systems or sensor signal processing. Address-Event- Representation (AER) is a neuromorphic communication protocol for ...
Ponencia
Spike Processing on an Embedded Multi-task Computer: Image Reconstruction
(IEEE Computer Society, 2007)
There is an emerging philosophy, called Neuro-informatics, contained in the Artificial Intelligence field, that aims to emulate how living beings do tasks such as taking a decision based on the interpretation of an image ...
Ponencia
Address-Event based Platform for Bio-inspired Spiking Systems
(SPIE Digital LIbrary, 2007-05)
Address Event Representation (AER) is an emergent neuromorphic interchip communication protocol that allows a real-time virtual massive connectivity between huge number neurons, located on different chips. By exploiting ...
Artículo
Diseño e implementación de un simulador software basado en el procesador MIPS32
(Universidad de Granada, 2015)
La arquitectura de computadores es una asignatura de gran importancia actualmente en las titulaciones de Informática. Pero en muchas ocasiones, los estudiantes tienen problemas para comprender la materia debido a la falta ...
Ponencia
Neuro-Inspired Real-Time USB & PCI to AER Interfaces for Vision Processing
(IEEE, 2008-06)
Address-Event-Representation (AER) is an emergent neuromorphic interchip communication protocol that allows for real-time virtual massive connectivity between huge number neurons located on different chips. By exploiting ...
Capítulo de Libro
Visual Spike Processing based on Cellular Automaton
(Interchopen, 2011-04)