Buscar
Mostrando ítems 1-2 de 2
Ponencia
Live Demonstration: Neuromorphic Row-by-Row Multi-convolution FPGA Processor-SpiNNaker architecture for Dynamic-Vision Feature Extraction
(IEEE Computer Society, 2019)
In this demonstration a spiking neural network architecture for vision recognition using an FPGA spiking convolution processor, based on leaky integrate and fire neurons (LIF) and a SpiNNaker board is presented. The ...
Ponencia
Spiking row-by-row FPGA Multi-kernel and Multi-layer Convolution Processor.
(IEEE Computer Society, 2019)
Spiking convolutional neural networks have become a novel approach for machine vision tasks, due to the latency to process an input stimulus from a scene, and the low power consumption of these kind of solutions. ...