Buscar
Mostrando ítems 1-3 de 3
Ponencia
Poisson AER generator: Inter-Spike-Intervals Analysis
(IEEE Computer Society, 2006)
Address-event-representation (AER) is a communication protocol for transferring asynchronous events between VLSI chips, originally developed for bio-inspired processing systems (for example, image processing). Such systems ...
Ponencia
Inter-spike-intervals Analysis of Poisson Like Hardware Synthetic AER Generation
(Springer, 2005)
Address-Event-Representation (AER) is a communication protocol for transferring images between chips, originally developed for bio-inspired image processing systems. Such systems may consist of a complicated hierarchical ...
Ponencia
A Precise CMOS Mismatch Model for Analog Design from Weak to Strong Inversion
(IEEE Computer Society, 2004)
A five parameter mismatch model continuos from weak to strong inversion is presented. The model is an extension of a previously reported one valid in the strong inversion region [1]. A mismatch characterization of NMOS ...