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Building Hierarchical Tree Representations Using Homological-Based Tools
(Springer, 2021)
A new algorithm for computing the α-tree hierarchical repre sentation of a grey-scale digital image is presented here. The technique is based on an efficient simplified version of the Homological Spanning For est (HSF) ...
Tesis Doctoral
Ponencia
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Práctica de desarrollo de interfaces hardware/software para el manejo de sensores de redes inalámbricas
(AENUI: Asociación de Enseñantes Universitarios de Informática, 2011)
En este artículo se describe una práctica de laboratorio en la que se ilustran los mecanismos necesarios para implementar redes de sensores inalámbricos y la comunicación hardware/software en un PC. En los últimos ...
Ponencia
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A Genetic Programming infrastructure profiting from public computation resources
(Editorial CIEMAT, 2007)
In this article an experience of the utilization of PRC (Public Resource Computation) in research projects that needs large quantities of CPU time is presented. We have developed a distributed architecture based on ...
Artículo
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Hierarchical D ∗ algorithm with materialization of costs for robot path planning
(Elsevier, 2005)
In this paper a new hierarchical extension of the D ∗ algorithm for robot path planning is introduced. The hierarchical D ∗ algorithm uses a down-top strategy and a set of precalculated paths (materialization of path ...
Artículo
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Diavideos: a Diabetes Health Video Portal
(IOS Press, 2013)
Diavideos1 is a web platform that collects trustworthy diabetes health videos from YouTube and offers them in a easy way. YouTube is a big repository of health videos, but good content is sometimes mixed with misleading ...
Ponencia
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Event-Driven Configurable Module with Refractory Mechanism for ConvNets on FPGA
(IEEE Computer Society, 2018)
We have developed a fully configurable event-driven convolutional module with refractory period mechanism that can be used to implement arbitrary Convolutional Neural Networks (ConvNets) on FPGAs following a 2D array ...
Ponencia
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Event data downscaling for embedded computer vision
(SciTePress, 2022-02)
Event cameras (or silicon retinas) represent a new kind of sensor that measure pixel-wise changes in brightness and output asynchronous events accordingly. This novel technology allows for a sparse and energy-efficient ...
Ponencia
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Sistema de co-diseño hardware/software basado en FPGA para la captura de video analógico a través del bus serie USB
(AENUI: Asociación de Enseñantes Universitarios de Informática, 2011)
Con la adaptación del Espacio Europeo de Educación Superior (EEES) y la creación de los nuevo títulos de grado, se plantea una nueva visión metodológica en la enseñanzas superiores. En el caso de titulaciones relativas ...
Ponencia
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Using FPGA for visuo-motor control with a silicon retina and a humanoid robot
(IEEE Computer Society, 2007)
The address-event representation (AER) is a neuromorphic communication protocol for transferring asynchronous events between VLSI chips. The event information is transferred using a high speed digital parallel bus. ...