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Artículo
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A parallel Homological Spanning Forest framework for 2D topological image analysis
(Elsevier, 2016)
In [14], a topologically consistent framework to support parallel topological analysis and recognition for2 D digital objects was introduced. Based on this theoretical work, we focus on the problem of findingefficient ...
Ponencia
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A parametric formulation of tracking methods: application to chained systems
(IEEE Computer Society, 2004)
When following a path, there are several possibilities attending to the way in which the actual robot state can be related with the whole path. In this work, we formulate different tracking methods on the base that a ...
Ponencia
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Performance analysis of single-slave Bluetooth piconets under cochannel interference
(IEEE Computer Society, 2004)
We present an analytical model for single-slave Bluetooth piconets when the coexistence of multiple interfering devices produces collisions. Closed-form expressions for the channel throughput and the mean packet delay are ...
Ponencia
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Labeling Color 2D Digital Images in Theoretical Near Logarithmic Time
(Springer, 2017)
A design of a parallel algorithm for labeling color flat zones (precisely, 4-connected components) of a gray-level or color 2D digital image is given. The technique is based in the construction of a particular Homological ...
Artículo
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Developing Efficient Discrete Simulations on Multicore and GPU Architectures
(MDPI, 2020)
In this paper we show how to efficiently implement parallel discrete simulations on multicoreandGPUarchitecturesthrougharealexampleofanapplication: acellularautomatamodel of laser dynamics. We describe the techniques employed ...
Tesis Doctoral
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Estudio y evaluación de plataformas de distribución de cómputo intensivo sobre sistemas externos para sistemas empotrados.
(2016-03-14)
Nowadays, the capabilities of current embedded systems are constantly increasing, having a wide range of applications. However, there are a plethora of intensive computing tasks that, because of their hardware limitations, ...
Ponencia
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Análisis a Bajo Nivel de Procesadores Superescalares Reales
(Universidad de Alcalá de Henares. Servicio de Publicaciones, 2000)
En esta ponencia-demo se presenta una práctica donde se analiza la influencia en el tiempo de ejecución de algunas optimizaciones sobre el código máquina para procesadores reales (familia Intel Pentium). Se propone el ...
Ponencia
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Frames-to-AER efficiency study based on CPUs Performance Counters
(IEEE Computer Society, 2010)
Image processing in digital computer systems usually considers the visual information as a sequence of frames. These frames are from photographs that capture reality for a short period of time. They are renewed and ...
Artículo
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Generating (co)homological information using boundary scale
(Elsevier, 2020)
In this paper we develop a new computational technique called boundary scale-space theory. This tech- nique is based on the topol1 ogical paradigm consisting of representing a geometric subdivided object K using a one-parameter ...
Ponencia
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Un simulador gráfico para la enseñanza de memorias caché
(Universidad Politécnica de Madrid, 2000)