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Artículo
Design methodology for low-jitter differential clock recovery circuits in high performance ADCs
(Springer, 2016)
This paper presents a design methodology for the simultaneous optimization of jitter and power consumption in ultra-low jitter clock recovery circuits (<100fsrms) for high-performance ADCs. The key ideas of the design ...
Artículo
On chopper effects in discrete-time ΣΔ modulators
(Institute of Electrical and Electronics Engineers, 2010)
Analog-to-digital converters based on ΣΔ modulators are used in a wide variety of applications. Due to their inherent monotonous behavior, high linearity, and large dynamic range, they are often the preferred option for ...