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Mostrando ítems 1-5 de 5
Artículo
Switched-Current Chaotic Neurons
(Institution of Engineering and Technology, 1994)
The Letter presents two nonlinear CMOS current-mode circuits that implement neuron soma equations for chaotic neural networks. They have been fabricated in a double-metal, single-poly 1.6µm CMOS technology. The neuron soma ...
Artículo
Compact low-power calibration mini-DACs for neural arrays with programmable weights
(Institute of Electrical and Electronics Engineers, 2003)
This paper considers the viability of compact low-resolution low-power mini digital-to-analog converters (mini-DACs) for use in large arrays of neural type cells, where programmable weights are required. Transistors are ...
Artículo
Log-domain implementation of complex dynamics reaction-diffusion neural networks
(Institute of Electrical and Electronics Engineers, 2003)
In this paper, we have identified a second-order reaction-diffusion differential equation able to reproduce through parameter setting different complex spatio-temporal behaviors. We have designed a log-domain hardware that ...
Artículo
Switched-capacitor neural networks for linear programming
(Institution of Engineering and Technology, 1988)
A circuit for online solving of linear programming problems is presented. The circuit uses switched-capacitor techniques and is thus suitable for monolithic implementation. The connection of the proposed circuit to analogue ...
Artículo
AER image filtering architecture for vision-processing systems
(Institute of Electrical and Electronics Engineers, 1999)
A VLSI architecture is proposed for the realization of real-time two-dimensional (2-D) image filtering in an address-event-representation (AER) vision system. The architecture is capable of implementing any convolutional ...