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Artículo
A 32 x 32 Pixel Convolution Processor Chip for Address Event Vision Sensors With 155 ns Event Latency and 20 Meps Throughput
(IEEE Computer Society, 2011)
This paper describes a convolution chip for event-driven vision sensing and processing systems. As opposed to conventional frame-constraint vision systems, in event-driven vision there is no need for frames. In frame-free ...
Ponencia
Red neuronal convolucional rápida sin fotogramas para reconocimientos de dígitos
(Unión Científica Internacional de Radio, 2011)
In this paper a bio-inspired six-layer convolutional network (ConvNet) non-frame based for digit recognition is shown. The system has been trained with the backpropagation algorithm using 32x32 images from the MNIST ...
Artículo
A CMOL-Like Memristor-CMOS Neuromorphic Chip-Core Demonstrating Stochastic Binary STDP
(Institute of Electrical and Electronics Engineers Inc., 2022-12)
The advent of nanoscale memristors raised hopes of being able to build CMOL (CMOS/nanowire/molecular) type ultra-dense in-memory-computing circuit architectures. In CMOL, nanoscale memristors would be fabricated at the ...