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Mostrando ítems 1-10 de 36
Artículo
Compensation of PVT Variations in ToF Imagers with In-Pixel TDC
(MDPI, 2017)
The design of a direct time-of-flight complementary metal-oxide-semiconductor (CMOS) image sensor (dToF-CIS) based on a single-photon avalanche-diode (SPAD) array with an in-pixel time-to-digital converter (TDC) must ...
Artículo
A 515 nW, 0-18 dB programmable gain analog-to-digital converter for in-channel neural recording interfaces
(Institute of Electrical and Electronics Engineers, 2014)
This paper presents a low-area low-power Switched-Capacitor (SC)-based Programmable-Gain Analog-to-Digital Converter (PG-ADC) suitable for in-channel neural recording applications. The PG-ADC uses a novel implementation ...
Artículo
Reducing the Impact of Reverse Currents in Tunnel FET Rectifiers for Energy Harvesting Applications
(Institute of Electrical and Electronics Engineers, 2017)
RF to DC passive rectifiers can benefit from the superior performance at low voltage of tunnel transistors. They have shown higher power conversion efficiency (PCE) at low input power than Si FinFETs counterparts. In this ...
Artículo
A Customizable Thermographic Imaging System for Medical Image Acquisition and Processing
(Institute of Electrical and Electronics Engineers, 2022)
A custom system has been developed for medical image acquisition and processing in both the visible and the infrared (IR) bands. Unlike some non-customizable commercial devices, this system can easily be adapted to different ...
Ponencia
An ultra-low-power voltage-mode asynchronous WTA-LTA circuit
(Institute of Electrical and Electronics Engineers, 2013)
This paper presents an asynchronous mixed-signal WTA-LTA circuit conceived to carry out local minimummaximum indexing in massively parallel image processing arrays. The hardware is focused on energy-efficient operation. ...
Ponencia
Real-time single-exposure ROI-driven HDR adaptation based on focal-plane reconfiguration
(Society of Photo-Optical Instrumentation Engineers, 2015)
This paper describes a prototype smart imager capable of adjusting the photo-integration time of multiple regions of interest concurrently, automatically and asynchronously with a single exposure period. The operation is ...
Artículo
Gate-Level Design Methodology for Side-Channel Resistant Logic Styles Using TFETs
(IEEE, 2021)
The design of secure circuits in emerging technologies is an appealing area that requires new efforts and attention as an effective solution to secure applications with power constraints. The paper deals with the optimized ...
Ponencia
DOE based high-performance gate-level pipelines
(Institute of Electrical and Electronics Engineers, 2014)
Domino dynamic circuits are widely used in critical parts of high performance systems. In this paper we show that in addition to the functional limitation associated to the noninverting behavior of domino gates, there ...
Ponencia
Exploring logic architectures suitable for TFETs devices
(Institute of Electrical and Electronics Engineers, 2017)
Tunnel transistors are steep subthreshold slope devices suitable for low voltage operation so being potential candidates to overcome the power density and energy inefficiency limitations of CMOS technology, which are ...
Artículo
A Mobile Platform for Movement Tracking Based on a Fast-Execution-Time Optical-Flow Algorithm
(Institute of Electrical and Electronics Engineers, 2022)
A multi-purpose mechanical platform to track moving objects in three-dimensional space has been developed. It is composed of one main microcontroller board that processes all system data, two cameras, three motors, and one ...