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Mostrando ítems 1-10 de 34
Ponencia
Integer-based digital processor for the estimation of phase synchronization between neural signals
(Institute of Electrical and Electronics Engineers, 2016)
This paper reports a low area, low power, integer-based neural digital processor for the calculation of phase synchronization between two neural signals. The processor calculates the phase-frequency content of a signal by ...
Artículo
Single-Exposure HDR Technique Based on Tunable Balance Between Local and Global Adaptation
(Institute of Electrical and Electronics Engineers, 2016)
This brief describes a high-dynamic-range technique that compresses wide ranges of illuminations into the available signal range with a single exposure. An online analysis of the image histogram provides the sensor with ...
Ponencia
Hardware-Aware Performance Evaluation for the Co-Design of Image Sensors and Vision Algorithms
(Institute of Electrical and Electronics Engineers, 2016)
The top-down approach to system design allows obtaining separate specifications for each subsystem. In the case of vision systems, this means propagating system-level specifications down to particular specifications for ...
Artículo
Design methodology for low-jitter differential clock recovery circuits in high performance ADCs
(Springer, 2016)
This paper presents a design methodology for the simultaneous optimization of jitter and power consumption in ultra-low jitter clock recovery circuits (<100fsrms) for high-performance ADCs. The key ideas of the design ...
Ponencia
In-pixel Voltage-Controlled Ring-Oscillator for Phase Interpolation in ToF Image Sensors
(2016)
The design and measurements of a CMOS pseudodifferential voltage-controlled ring-oscillator (VCRO) are presented. It is aimed to act as time interpolator for arrayable picosecond time-to-digital convertors (TDC). This ...
Artículo
Benchmarking Spike-Based Visual Recognition: A Dataset and Evaluation
(Frontiers Media, 2016)
Today, increasing attention is being paid to research into spike-based neural computation both to gain a better understanding of the brain and to explore biologically-inspired computation. Within this field, the primate ...
Artículo
Fast Predictive Handshaking in Synchronous FPGAs for Fully Asynchronous Multisymbol Chip Links: Application to SpiNNaker 2-of-7 Links
(Institute of Electrical and Electronics Engineers, 2016)
Asynchronous handshaken interchip links are very popular among neuromorphic full-custom chips due to their delay-insensitive and high-speed properties. Of special interest are those links that minimize bit-line transitions ...
Artículo
Energy-Aware Low-Power CMOS LNA with Process-Variations Management
(Hindawi Publishing Corporation, 2016)
A reconfigurable low-noise amplifier (LNA) with digitally controllable gain and power consumption is presented.This architecture allows increasing power consumption only when required, that is, to improve LNA’s radiofrequency ...
Ponencia
A Dual-Factor Access Control System Based on Device and User Intrinsic Identifiers
(IEEE, 2016-12)
This paper proposes an access control system based on the simultaneous authentication of what the user has and who the user is. At enrollment phase, the wearable access device (a smart card, key fob, etc.) stores a ...
Artículo