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Mostrando ítems 1-10 de 17
Artículo
Current-mode fully-programmable piece-wise-linear block for neuro-fuzzy applications
(Institute of Electrical and Electronics Engineers, 2002)
A new method to implement an arbitrary piece-wise-linear characteristic in current mode is presented. Each of the breaking points and each slope is separately controllable. As an example a block that implements an N-shaped ...
Ponencia
Bio-inspired analog parallel array processor chip with programmable spatio-temporal dynamics
(Institute of Electrical and Electronics Engineers, 2002)
A bio-inspired model for an analog parallel array processor (APAP), based on studies on the vertebrate retina, permits the realization of complex spatio-temporal dynamics in VLSI. This model mimics the way in which images ...
Artículo
Testing mixed-signal cores: a practical oscillation-based test in an analog macrocell
(Institute of Electrical and Electronics Engineers, 2002)
A formal set of design decisions can aid in using oscillation-based test (OBT) for analog subsystems in SoCs. The goal is to offer designers testing options that do not have significant area overhead, performance degradation, ...
Ponencia
Herramientas de CAD para la síntesis de sistemas de interferencia difusos mediante FPGAs
(2002)
En esta comunicación se describe un flujo de diseño que permite automatizar el proceso de síntesis sobre FPGAs de sistemas de inferencia basados en lógica difusa. El entorno de CAD utilizado combina herramientas específicas ...
Ponencia
A 2.5-V ΣΔ modulator in 0.25-um CMOS for ADSL
(Institute of Electrical and Electronics Engineers, 2002)
This paper presents a dual-quantization SC Sigma-Delta Modulator intended for A/D Conversion in ADSL applications.
Artículo
Integrated chaos generators
(Institute of Electrical and Electronics Engineers, 2002)
This paper surveys the different design issues, from mathematical model to silicon, involved on the design of integrated circuits for the generation of chaotic behavior.
Ponencia
CMOS design of cellular APAPs and FPAPAPs: an overview
(Institute of Electrical and Electronics Engineers, 2002)
CNN-based analog visual microprocessors have similarities with the so-called Single Instruction Multiple Data systems, although they work directly on analog signal representations obtained through embedded optical sensors ...
Ponencia
Mismatch-induced tradeoffs and scalability of mixed-signal vision chips
(Institute of Electrical and Electronics Engineers, 2002)
This paper explores different trade-offs associated with the design of analog VLSI chips. These trade-offs are related to the necessity of keeping the analog accuracy while taking advantage of the possibility of reducing ...
Ponencia
Hardware/software codesign methodology for fuzzy controller implementation
(Institute of Electrical and Electronics Engineers, 2002)
This paper describes a HW/SW codesign methodology for the implementation of fuzzy controllers on a platform composed by a general-purpose microcontroller and specific processing elements implemented on FPGAs or ASICs. ...
Ponencia
Generation of technology-portable flexible analog blocks
(Institute of Electrical and Electronics Engineers, 2002)
This paper introduces a complete methodology for retargeting of analog blocks to different sets of specifications, even to different technology processes. By careful integration of the tuning process of design parameters ...