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Mostrando ítems 1-10 de 32
Ponencia
Design Considerations for Multistandard Cascade ΣΔ Modulators
(2005)
This paper discusses design considerations for cascade Sigma-Delta Modulators (ΣΔMs) included in multistandard wireless receivers. Four different standards are covered: GSM, Bluetooth, UMTS, and WLAN. A top-down design ...
Ponencia
Reliable analysis of settling errors in SC integrators-application to the design of high-speed /spl Sigma//spl Delta/ modulators
(Institute of Electrical and Electronics Engineers, 2000)
This paper presents a detailed study on the transient response of SC integrators which takes into account the effects of amplifier finite gain-bandwidth product, slew-rate, and parasitic capacitances. Unlike previous models, ...
Artículo
A CMOS 110-dB@40-kS/s programmable-gain chopper-stabilized third-order 2-1 cascade sigma-selta modulator for low-power high-linearity automotive aensor ASICs
(Institute of Electrical and Electronics Engineers, 2005)
This paper describes a 0.35-μm CMOS chopper-stabilized switched-capacitor 2-1 cascade ΣΔ modulator for automotive sensor interfaces. The modulator architecture has been selected from an exhaustive comparison among multiple ...
Ponencia
Design Considerations for an Automotive Sensor Interface Sigma-Delta Modulator
(Institute of Electrical and Electronics Engineers, 2003)
The Sigma-Delta Modulator presented in this paper contains a programmable-gain input inferface to accommodate the output signal level of a variety of automotive sensors. We show that this characteristic can be efficiently ...
Ponencia
Experimental Characterization of IdleTones in Second-Order Bandpass ΣΔ Modulators
(2000)
This paper analyses the tonal behaviour of the quantization noise in second-order bandpass ΣΔ modulators. The analysis performed for lowpass modulators is extended to the bandpass case. As a result, closed form expressions ...
Ponencia
Expandible high-order cascade ya modulator with constant, reduced systematic loss of resolution
(Institute of Electrical and Electronics Engineers, 2003)
An arbitrary order sigma-delta modulator cascude architecture is presented with only I-bit loss of resolution due to scaling issues, even with single-bit quantizulion. This loss is kept with a high overloading point, ...
Ponencia
Accurate VHDL-based simulation of Sigma Delta modulators
(Institute of Electrical and Electronics Engineers, 2003)
The computational cost of transient simulation of /spl Sigma//spl Delta/ modulators (/spl Sigma//spl Delta/Ms) at the electrical level is prohibitively high. Behavioral simulation techniques offer a promising solution to ...
Ponencia
CMOS Architectures and circuits for high-speed decision-making from image flows
(The International Society for Optical Engineering (SPIE), 2008)
We present architectures, CMOS circuits and CMOS chips to process image flows at very high speed. This is achieved by exploiting bio-inspiration and performing processing tasks in parallel manner and concurrently with image ...
Ponencia
A SIMULINK-based approach for fast and precise simulation of switched-capacitor, switched-current and continuous-time /spl Sigma//spl Delta/ modulators
(Institute of Electrical and Electronics Engineers, 2003)
This paper describes how to extend the capabilities of SIMULINK for the time-domain simulation of /spl Sigma//spl Delta/ modulators implemented by using switched-capacitor, switched-current and continuous-time circuits, ...
Artículo
High-level synthesis of switched-capacitor, switched-current and continuous-time ΣΔ modulators using SIMULINK-based time-domain behavioral models
(Institute of Electrical and Electronics Engineers, 2005)
This paper presents a high-level synthesis tool for ΣΔ Modulators (ΣΔMs) that combines an accurate SIMULINK-based time-domain behavioral simulator with a statistical optimization core. Three different circuit techniques ...