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Mostrando ítems 1-9 de 9
Artículo
A real-time clustering microchip neural engine
(Institute of Electrical and Electronics Engineers, 1996)
This paper presents an analog current-mode VLSI implementation of an unsupervised clustering algorithm. The clustering algorithm is based on the popular ART1 algorithm, but has been modified resulting in a more VLSI-friendly ...
Artículo
Very wide range tunable CMOS/bipolar current mirrors with voltage clamped input
(Institute of Electrical and Electronics Engineers, 1999)
In low power current mode signal processing circuits it is often necessary to use current mirrors to replicate and amplify/attenuate current signals and clamp the voltage of nodes with high parasitic capacitances so that ...
Artículo
A general translinear principle for subthreshold MOS transistors
(Institute of Electrical and Electronics Engineers, 1999)
This paper revises the conditions under which the translinear principle can be fully exploited for MOS transistors operating in subthreshold. Due to the exponential nature of subthreshold MOS transistors, the translinear ...
Artículo
An ART1 microchip and its use in multi-ART1 systems
(Institute of Electrical and Electronics Engineers, 1997)
Recently, a real-time clustering microchip neural engine based on the ART1 architecture has been reported. Such chip is able to cluster 100-b patterns into up to 18 categories at a speed of 1.8 μs per pattern. However, ...
Artículo
The active-input regulated-cascode current mirror
(Institute of Electrical and Electronics Engineers, 1994)
A continuous-time current mirror circuit is presented that combines an active input and a regulated cascode output. The current mirror offers a high accuracy over an operating current range higher than previous structures. ...
Artículo
A high-precision current-mode WTA-MAX circuit with multichip capability
(Institute of Electrical and Electronics Engineers, 1998)
This paper presents a circuit design technique suitable for the realization of winner-take-all (WTA), maximum (MAX), looser-take-all (LTA), and minimum (MIN) circuits. The technique presented is based on current replication ...
Artículo
A modified ART 1 algorithm more suitable for VLSI implementations
(Elsevier, 1996)
This paper presents a modification to the original ART 1 algorithm (Carpenter and Grossberg, 1987a, A massively parallel architecture for a self-organizing neural pattern recognition machine, Computer Vision, Graphics, and ...
Artículo
AER image filtering architecture for vision-processing systems
(Institute of Electrical and Electronics Engineers, 1999)
A VLSI architecture is proposed for the realization of real-time two-dimensional (2-D) image filtering in an address-event-representation (AER) vision system. The architecture is capable of implementing any convolutional ...
Artículo
7-decade tuning range CMOS OTA-C sinusoidal VCO
(Institute of Electrical and Electronics Engineers, 1998)
A new operational transconductance amplifier-capacitor (OTA-C) based sinusoidal voltage-controlled oscillator (VCO) has been designed and fabricated, the oscillation frequency of which can be tuned from 74 mHz to 1 MHz. ...