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Mostrando ítems 1-10 de 10
Artículo
Compact low-power calibration mini-DACs for neural arrays with programmable weights
(Institute of Electrical and Electronics Engineers, 2003)
This paper considers the viability of compact low-resolution low-power mini digital-to-analog converters (mini-DACs) for use in large arrays of neural type cells, where programmable weights are required. Transistors are ...
Artículo
Benchmarking Spike-Based Visual Recognition: A Dataset and Evaluation
(Frontiers Media, 2016)
Today, increasing attention is being paid to research into spike-based neural computation both to gain a better understanding of the brain and to explore biologically-inspired computation. Within this field, the primate ...
Artículo
A spatial contrast retina with on-chip calibration for neuromorphic spike-based AER vision systems
(Institute of Electrical and Electronics Engineers, 2007)
We present a 32 32 pixels contrast retina microchip that provides its output as an address event representation (AER) stream. Spatial contrast is computed as the ratio between pixel photocurrent and a local average between ...
Artículo
A neuromorphic cortical-layer microchip for spike-based event processing vision systems
(Institute of Electrical and Electronics Engineers, 2006)
We present a neuromorphic cortical-layer processing microchip for address event representation (AER) spike-based processing systems. The microchip computes 2-D convolutions of video information represented in AER format ...
Artículo
A 32 x 32 Pixel Convolution Processor Chip for Address Event Vision Sensors With 155 ns Event Latency and 20 Meps Throughput
(IEEE Computer Society, 2011)
This paper describes a convolution chip for event-driven vision sensing and processing systems. As opposed to conventional frame-constraint vision systems, in event-driven vision there is no need for frames. In frame-free ...
Artículo
On the design and characterization of femtoampere current-mode circuits
(Institute of Electrical and Electronics Engineers, 2003)
In this paper, we show and validate a reliable circuit design technique based on source voltage shifting for current-mode signal processing down to femtoamperes. The technique involves specific-current extractors and ...
Ponencia
Exploiting memristance for implementing spike-time-dependent-plasticity in neuromorphic nanotechnology systems
(2009)
In this paper we show that STDP can be implemented using a crossbar memristive array combined with neurons that asynchronously generate spikes of a given shape. An attenuated version of such spikes needs to be sent ...
Artículo
Hardware Implementation of Differential Oscillatory Neural Networks Using VO 2-Based Oscillators and Memristor-Bridge Circuits
(Frontiers Media, 2021)
Oscillatory Neural Networks (ONNs) are currently arousing interest in the research community for their potential to implement very fast, ultra-low-power computing tasks by exploiting specific emerging technologies. From ...
Ponencia
A spatial calibrated AER contrast retina with adjustable contrast threshold
(2009)
Address Event Representation (AER) is an emergent technology for assembling modular multi-blocks bio-inspired sensory and processing systems. Visual sensors (retinae) are among the first AER modules to be reported since ...
Artículo
A calibration technique for very low current and compact tunable neuromorphic cells: Application to 5-bit 20nA DACs
(Institute of Electrical and Electronics Engineers, 2008)
Low current applications, like neuromorphic circuits, where operating currents can be as low as a few nanoamperes or less, suffer from huge transistor mismatches, resulting in around or less than 1-bit precisions. Recently, ...