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Artículo
Very wide range tunable CMOS/bipolar current mirrors with voltage clamped input
(Institute of Electrical and Electronics Engineers, 1999)
In low power current mode signal processing circuits it is often necessary to use current mirrors to replicate and amplify/attenuate current signals and clamp the voltage of nodes with high parasitic capacitances so that ...
Artículo
On Multiple AER Handshaking Channels Over High-Speed Bit-Serial Bidirectional LVDS Links With Flow-Control and Clock-Correction on Commercial FPGAs for Scalable Neuromorphic Systems
(Institute of Electrical and Electronics Engineers, 2017)
Address event representation (AER) is a widely employed asynchronous technique for interchanging “neural spikes” between different hardware elements in neuromorphic systems. Each neuron or cell in a chip or a system is ...
Ponencia
OTA-based non-linear function approximations
(Institute of Electrical and Electronics Engineers, 1989)
The suitability of operational transconductance amplifiers (OTAs) as the main active element to obtain basic building blocks for the design of programmable nonlinear continuous-time networks is examined. The main purpose ...
Artículo
A general translinear principle for subthreshold MOS transistors
(Institute of Electrical and Electronics Engineers, 1999)
This paper revises the conditions under which the translinear principle can be fully exploited for MOS transistors operating in subthreshold. Due to the exponential nature of subthreshold MOS transistors, the translinear ...
Ponencia
Red neuronal convolucional rápida sin fotogramas para reconocimientos de dígitos
(Unión Científica Internacional de Radio, 2011)
In this paper a bio-inspired six-layer convolutional network (ConvNet) non-frame based for digit recognition is shown. The system has been trained with the backpropagation algorithm using 32x32 images from the MNIST ...
Artículo
A precise 90º quadrature OTA-C oscillator tunable in the 50-130-MHz range
(Institute of Electrical and Electronics Engineers, 2004)
We present a very-large-scale integration continuous-time sinusoidal operational transconductance amplifiers quadrature oscillator fabricated in a standard double-poly 0.8-μm CMOS process. The oscillator is tunable in the ...
Ponencia
AER Building Blocks for Multi-Layer Multi-Chip Neuromorphic Vision Systems
(Neural Information Processing Systems Foundation, 2005)
A 5-layer neuromorphic vision processor whose components communicate spike events asychronously using the address-eventrepresentation (AER) is demonstrated. The system includes a retina chip, two convolution chips, a ...
Artículo
An Address Event Representation-based Processing System for a Biped Robot
(SAGE Publications, 2016)
In recent years, several important advances have been made in the fields of both biologically inspired sensorial processing and locomotion systems, such as Address Event Representation-based cameras (or Dynamic Vision ...
Ponencia
A basic building block approach to CMOS design of analog neuro/fuzzy systems
(Institute of Electrical and Electronics Engineers, 1994)
Outlines a systematic approach to design fuzzy inference systems using analog integrated circuits in standard CMOS VLSI technologies. The proposed circuit building blocks are arranged in a layered neuro/fuzzy architecture ...
Artículo
Generalized reconfigurable memristive dynamical system (MDS) for neuromorphic applications
(Frontiers Media, 2015)
This study firstly presents (i) a novel general cellular mapping scheme for two dimensional neuromorphic dynamical systems such as bio-inspired neuron models, and (ii) an efficient mixed analog-digital circuit, which can ...