Listar Instituto de Microelectrónica de Sevilla (IMSE-CNM) por título
Mostrando ítems 338-357 de 599
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Artículo
Gate-Level Design Methodology for Side-Channel Resistant Logic Styles Using TFETs
(IEEE, 2021)The design of secure circuits in emerging technologies is an appealing area that requires new efforts and attention as an ...
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Ponencia
Gaussian Pyramid Extraction with a CMOS Vision Sensor
(Institute of Electrical and Electronics Engineers, 2014)This paper addresses a CMOS vision sensor with 176 × 120 pixels in standard 0.18 μm CMOS technology that computes the ...
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Artículo
Gaussian Pyramid: Comparative Analysis of Hardware Architectures
(Institute of Electrical and Electronics Engineers, 2017)This paper addresses a comparison of architectures for the hardware implementation of Gaussian image pyramids. Main ...
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Generalized reconfigurable memristive dynamical system (MDS) for neuromorphic applications
(Frontiers Media, 2015)This study firstly presents (i) a novel general cellular mapping scheme for two dimensional neuromorphic dynamical systems ...
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Ponencia
Generation and design of sinusoidal oscillators using OTAS
(Institute of Electrical and Electronics Engineers, 1988)The design of voltage-controlled oscillators (VCOs) using operational transconductance amplifiers (OTAs) is discussed. ...
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Generation of HDL models for bio-impedance sensor simulation based on microelectrodes
(International Frequency Sensor Association, 2011)This paper presents a computer tool for automatic analysis of cell culture images. The program allows the extraction of ...
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Ponencia
Generation of technology-portable flexible analog blocks
(Institute of Electrical and Electronics Engineers, 2002)This paper introduces a complete methodology for retargeting of analog blocks to different sets of specifications, even ...
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Ponencia
Geometrically-constrained, parasitic-aware synthesis of analog ICs
(The International Society for Optical Engineering - SPIE, 2005)In order to speed up the design process of analog ICs, iterations between different design stages should be avoided as ...
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Global design of analog cells using statistical optimization techniques
(Springer, 1994)We present a methodology for automated sizing of analog cells using statistical optimization in a simulation based approach. ...
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Artículo
Guest editorial - Special Issue on neural networks hardware implementations
(Institute of Electrical and Electronics Engineers, 2003) -
Artículo
Hairiness: the missing link between pollinators and pollination
(PeerJ, 2016)Background. Functional traits are the primary biotic component driving organism influence on ecosystem functions; in ...
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Ponencia
Hardware Implementation of a Biometric Recognition Algorithm based on In-Air Signature
(IEEE, 2015-06-01)This paper presents the design of a prototype for a wearable device that implements a recognition system based on in-air ...
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Artículo
Hardware Implementation of Differential Oscillatory Neural Networks Using VO 2-Based Oscillators and Memristor-Bridge Circuits
(Frontiers Media, 2021)Oscillatory Neural Networks (ONNs) are currently arousing interest in the research community for their potential to implement ...
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Ponencia
Hardware-Aware Performance Evaluation for the Co-Design of Image Sensors and Vision Algorithms
(Institute of Electrical and Electronics Engineers, 2016)The top-down approach to system design allows obtaining separate specifications for each subsystem. In the case of vision ...
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Ponencia
Hardware/software codesign methodology for fuzzy controller implementation
(Institute of Electrical and Electronics Engineers, 2002)This paper describes a HW/SW codesign methodology for the implementation of fuzzy controllers on a platform composed by ...
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Ponencia
Harmonic Distortion in Fully-Differential Switched-Current Sigma-Delta Modulators
(1999)This paper presents a systematic analysis of the harmonic distortion in SD modulators (SDMs) implemented with ...
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Ponencia
Herramienta para el aprendizaje de un sistema de adquisición de datos
(2010)Se presenta un paquete de software didáctico que facilita el proceso de enseñanza/aprendizaje de la electrónica, orientado ...
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Ponencia
Herramientas de CAD para la síntesis de sistemas de interferencia difusos mediante FPGAs
(2002)En esta comunicación se describe un flujo de diseño que permite automatizar el proceso de síntesis sobre FPGAs de sistemas ...
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Artículo
Hierarchical Yield-Aware Synthesis Methodology Covering Device-, Circuit-, and System-Level for Radiofrequency ICs
(Institute of Electrical and Electronics Engineers, 2021)This paper presents an innovative yield-aware synthesis strategy based on a hierarchical bottom-up methodology that uses ...
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Ponencia
High-dynamic range tone-mapping algorithm for focal plane processors
(The International Society for Optics and Photonics, 2011)This paper presents a Dynamic Range improvement technique which is specially well-suited to be implemented in Focal Plane ...