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Ponencia
A 14-bit 4-MS/s Multi-bit Cascade Sigma-Delta Modulator in CMOS 0.35-um Digital Technology
(2000)
This paper presents a 4th-order 3-stage cascade SD modulator that achieves 14-bit dynamic range at 4MS/s using low oversampling ratio. It includes a programmable multi-bit quantizer in the last stage, providing 2-, 3-, ...
Ponencia
Reconfiguration of Cascade ΣΔ Modulators for Multistandard GSM/Bluetooth/UIMTS/WLAN Transceivers
(Institute of Electrical and Electronics Engineers, 2006)
This paper presents design considerations for cascade Sigma-Delta Modulators (ΣΔMs) included in multi-standard wireless transceivers. Four different standards are covered: GSM, Bluetooth, UMTS and WLAN. A top-down design ...
Ponencia
A 2.5-V ΣΔ modulator in 0.25-um CMOS for ADSL
(Institute of Electrical and Electronics Engineers, 2002)
This paper presents a dual-quantization SC Sigma-Delta Modulator intended for A/D Conversion in ADSL applications.
Ponencia
MATLAB/SIMULINK-Based High-Level Synthesis of Discrete-Time and Continuous-Time Sigma-Delta Modulators
(Institute of Electrical and Electronics Engineers, 2004)
This paper describes a tool that combines an accurate SIMULINK-based time-domain behavioural simulator with a statistical optimizer for the automated high-level synthesis of ΣΔ Modulators (ΣΔMs). The combination of high ...
Ponencia
Analysis and Experimental Characterization of Idle Tones in 2nd-Order Bandpass Sigma-Delta Modulators - A 0.8μm CMOS Switched-Current Case Study
(Institute of Electrical and Electronics Engineers, 2001)
Ths paper analyses the tonal behaviour of the quantization noise in 2nd-order bandpass SD modulators. The analysis previously performed for lowpass modulators is extended to the bandpass case. As a result, closed-form ...
Ponencia
High-order cascade multibit /spl Sigma//spl Delta/ modulators for xDSL applications
(Institute of Electrical and Electronics Engineers, 2000)
This paper explores the use of /spl Sigma//spl Delta/ modulators for A/D conversion in xDSL applications. Two high-order multibit architectures, the 2-1-1mb modulator and a novel 2-1-1-1mb cascade (MASH), are proposed to ...
Ponencia
Effect of Non-Linear Settling Error on The Harmonic Distortion of Fully-Differential Switched-Current BandPass Sigma-Delta Modulators
(Institute of Electrical and Electronics Engineers, 2001)
This paper presents a detailed study of the effect of the non-linear settling on the harmonic distortion of BandPass SD Modulators (BP-ΣΔMs) realized using Fully Differential (FD) SwItched-current (SI) circuits. Based on ...
Ponencia
A 0.35μm CMOS 17-bit@40kS/s Sensor A/D Interface Based on a Programmable-Gain Cascade 2-1 ΣΔ Modulator
(Institute of Electrical and Electronics Engineers, 2004)
This paper describes the design and electrical implementation of an A/D interface for sensor applications realized in a 0.35μm standard CMOS technology. The circuit is composed of a low-noise instrumentation preamplifier ...
Ponencia
A ΣΔ modulator for a programmable-gain, low-power, high-linearity automotive sensor interface
(The International Society for Optical Engineering - SPIE, 2003)
This paper describes the design and electrical implementation of a 0.35μm CMOS 17-bit≰0kS/s Sigma-Delta Modulator (ΣΔM) forming part of a sensor interface for automotive applications. First of all, the paper discusses the ...
Ponencia
High-speed global shutter CMOS machine vision sensor with high dynamic range image acquisition and embedded intelligence
(The International Society for Optics and Photonics, 2012)
High-speed imagers are required for industrial applications, traffic monitoring, robotics and unmanned vehicles, moviemaking, etc. Many of these applications call also for large spatial resolution, high sensitivity and the ...