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Mostrando ítems 111-117 de 117
Artículo
A CMOS 0.8 μm fully differential current mode buffer for HF SI circuits
(Elsevier, 1998)
We present a high-frequency fully-differential current-mode buffer to interface off-chip currents with no significant degradation of the frequency response, and to measure current-mode ICs using standard equipment. It has ...
Ponencia
A 0.5 /spl mu/m CMOS CNN analog random access memory chip for massive image processing
(Institute of Electrical and Electronics Engineers, 1998)
An analog RAM has been designed to act as a cache memory for a CNN Universal Machine. Hence, all the non-standard chips are available for the CNN Chipset architecture. Time-multiplexed analog routines in the CNN processor ...
Artículo
Algorithm for efficient symbolic analysis of large analogue circuits
(Institution of Engineering and Technology, 1994)
An algorithm is presented that generates simplified symbolic expressions for the small-signal characteristics of large analogue circuits. The expressions are approximated while they are computed, so that only the most ...
Artículo
A CMOS analog adaptive BAM with on-chip learning and weight refreshing
(Institute of Electrical and Electronics Engineers, 1993)
In this paper we will extend the transconductance-mode (T-mode) approach [1] to implement analog continuous-time neural network hardware systems to include on-chip Hebbian learning and on-chip analog weight storage capability. ...
Artículo
Fourth-order cascade SC ΣΔ modulators: a comparative study
(Institute of Electrical and Electronics Engineers, 1998)
Fourth-order cascade ΣΔ modulators are very well suited for IC implementation using analog sampled-data circuits because of their robust, stable operation and their capability to achieve high resolution and wide bandwidth ...
Ponencia
A CMOS Implementation of Fitzhugh-Nagumo Neuron Model
(Institute of Electrical and Electronics Engineers, 1990)
A CMOS circuit is proposed that emulates FitzHugh-Nagumo's differential equations using OTAs, diode connected MOSFETs and capacitors. These equations model the fundamental behavior of biological neuron cells. Fitz- ...
Ponencia
Learning in neuro/fuzzy analog chips
(Institute of Electrical and Electronics Engineers, 1995)
This paper focus on the design of adaptive mixed-signal fuzzy chips. These chips have parallel architecture and feature electrically-controlable surface maps. The design methodology is based on the use of composite transistors ...