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Mostrando ítems 1-10 de 61
Ponencia
A complete retargeting methodology for mixed-signal IC designs
(Institute of Electrical and Electronics Engineers, 2001)
In this paper, an efficient methodology to retargeting and reuse of embedded mixed-signal blocks is presented. Parametrized layout templates, accurate behavioral modeling of mixed-signal blocks, and appropriate mechanisms ...
Ponencia
Current-mode building blocks for CMOS-VLSI design of chaotic neural networks
(Institute of Electrical and Electronics Engineers, 1994)
This paper presents two nonlinear CMOS current-mode circuits that implement neuron soma equations for chaotic neural networks, and another circuit to realize programmable current-mode synapse using CMOS-compatible BJTs. ...
Ponencia
Integer-based digital processor for the estimation of phase synchronization between neural signals
(Institute of Electrical and Electronics Engineers, 2016)
This paper reports a low area, low power, integer-based neural digital processor for the calculation of phase synchronization between two neural signals. The processor calculates the phase-frequency content of a signal by ...
Ponencia
CMOS design of chaotic oscillators using state variables: a monolithic Chua's circuit
(Institute of Electrical and Electronics Engineers, 1993)
This paper presents design considerations for monolithic implementation of piecewise-linear (PWL) dynamic systems in CMOS technology. Starting from a review of available CMOS circuit primitives and their respective merits ...
Artículo
Design considerations for integrated continuous-time chaotic oscillators
(Institute of Electrical and Electronics Engineers, 1998)
This paper presents an optimization procedure to choose the chaotic state equation which is best suited for implementation using Gm-C integrated circuit techniques. The paper also presents an analysis of the most significant ...
Artículo
Switched-Current Chaotic Neurons
(Institution of Engineering and Technology, 1994)
The Letter presents two nonlinear CMOS current-mode circuits that implement neuron soma equations for chaotic neural networks. They have been fabricated in a double-metal, single-poly 1.6µm CMOS technology. The neuron soma ...
Ponencia
Self-calibration of neural recording sensors
(Institute of Electrical and Electronics Engineers, 2014)
This paper reports a calibration system for automatically adjusting the bandpass and gain characteristics of programmable E×G sensors. The calibration mechanism of the bandpass characteristic is based on a mixed-signal ...
Ponencia
Real-time phase correlation based integrated system for seizure detection
(The Society of Photo-Optical Instrumentation Engineers, 2017)
This paper reports a low area, low power, integer-based digital processor for the calculation of phase synchronization between two neural signals. The processor calculates the phase-frequency content of a signal by identifying ...
Artículo
Phase Synchronization Operator for On-Chip Brain Functional Connectivity Computation
(Institute of Electrical and Electronics Engineers, 2019)
This paper presents an integer-based digital processor for the calculation of phase synchronization between two neural signals. It is based on the measurement of time periods between two consecutive minima. The simplicity ...
Ponencia
A 0.18 μm CMOS low noise, highly linear continuous-time seventh-order elliptic low-pass filter
(The International Society for Optical Engineering- SPIE, 2005)
This paper presents a fast procedure for the system-level evaluation of noise and distortion in continuous-time integrated filters. The presented approach is based on Volterra's series theory and matrix algebra manipulation. ...