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Tesis Doctoral
Low-Power Artifact-Aware ImplantableNeural RecordingMicrosystem for Brain- Machine Interfaces
(2021-06-02)
Neuroscience research into how complex brain functions are implemented at cell level requires in vivo neural recording interfaces, including microelectrodes and read-out circuitry, with increased observability and spatial ...
Artículo
Compensation of PVT Variations in ToF Imagers with In-Pixel TDC
(MDPI, 2017)
The design of a direct time-of-flight complementary metal-oxide-semiconductor (CMOS) image sensor (dToF-CIS) based on a single-photon avalanche-diode (SPAD) array with an in-pixel time-to-digital converter (TDC) must ...
Artículo
A Wide Linear Dynamic Range Image Sensor Based on Asynchronous Self-Reset and Tagging of Saturation Events
(Institute of Electrical and Electronics Engineers, 2017)
We report a high dynamic range (HDR) image sensor with a linear response that overcomes some of the limitations of sensors with pixels with self-reset operation. It operates similar to an active pixel sensor, but its pixels ...
Tesis Doctoral
Design of CMOS Digital Silicon Photomultipliers with ToF for Positron Emission Tomography
(2020-05-29)
This thesis presents a contribution to the design of single-photon detectors for medical imaging. Specifically, the focus has been on the development of a pixel capable of single-photon counting in CMOS technology, and ...
Ponencia
A stored program 2/sup nd/ order/3-layer complex cell CNN-UM
(Institute of Electrical and Electronics Engineers, 2000)
A stored program 2/sup nd/ order/3-layer complex cell cellular neural network Universal Machine (CNN-UM) architecture is introduced. We discuss a number of phenomena that can be generated in this system by a single CNN ...
Ponencia
A complete retargeting methodology for mixed-signal IC designs
(Institute of Electrical and Electronics Engineers, 2001)
In this paper, an efficient methodology to retargeting and reuse of embedded mixed-signal blocks is presented. Parametrized layout templates, accurate behavioral modeling of mixed-signal blocks, and appropriate mechanisms ...
Ponencia
Wide range 8ps incremental resolution time interval generator based on FPGA technology
(Institute of Electrical and Electronics Engineers, 2014)
Accurate generation of picosecond-resolution wide-range time intervals has become a necessity for the characterization of time-to-digital converters involved in time resolved imaging. This paper presents the design and ...
Ponencia
A mixed-signal early vision chip with embedded image and programming memories and digital I/O
(The International Society for Optical Engineering - SPIE, 2003)
From a system level perspective, this paper presents a 128 × 128 flexible and reconfigurable Focal-Plane Analog Programmable Array Processor, which has been designed as a single chip in a 0.35μm standard digital 1P-5M CMOS ...
Ponencia
Digital processor array implementation aspects of a 3D multi-layer vision architecture
(Institute of Electrical and Electronics Engineers, 2010)
Technological aspects of the 3D integration of a multilayer combined mixed-signal and digital sensor-processor array chip is described. The 3D integration raises the question of signal routing, power distribution, and heat ...
Artículo
A Customizable Thermographic Imaging System for Medical Image Acquisition and Processing
(Institute of Electrical and Electronics Engineers, 2022)
A custom system has been developed for medical image acquisition and processing in both the visible and the infrared (IR) bands. Unlike some non-customizable commercial devices, this system can easily be adapted to different ...