Buscar
Mostrando ítems 1-4 de 4
Artículo
Chaos via a piecewise-linear switch ed-capacitor circuit
(Institution of Engineering and Technology, 1987)
A nonlinear switched-capacitor circuit that generates chaotic signals is reported. The circuit is described by a first-order piecewise-linear discrete equation that exhibits a chaotic dynamics. Experimental results ...
Artículo
Highly Linear 2,5-V CMOS ΣΔ Modulator for ADSL+
(Institute of Electrical and Electronics Engineers, 2004)
We present a 90-dB spurious-free dynamic range sigma–delta modulator (ΣΔM) for asymmetric digital subscriber line applications (both ADSL and ADSL+), with up to a 4.4-MS/s digital output rate. It uses a cascade (MASH) ...
Artículo
A 13-bit, 2.2-MS/s, 55-mW multibit cascade ΣΔ modulator in CMOS 0.7-μm single-poly technology
(Institute of Electrical and Electronics Engineers, 1999)
This paper presents a CMOS 0.7-μm ΣΔ modulator IC that achieves 13-bit dynamic range at 2.2 MS/s with an oversampling ratio of 16. It uses fully differential switched-capacitor circuits with a clock frequency of 35.2 MHz, ...
Artículo
Fourth-order cascade SC ΣΔ modulators: a comparative study
(Institute of Electrical and Electronics Engineers, 1998)
Fourth-order cascade ΣΔ modulators are very well suited for IC implementation using analog sampled-data circuits because of their robust, stable operation and their capability to achieve high resolution and wide bandwidth ...