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Ponencia
LVDS interface for AER links with burst mode operation capability
(IEEE Computer Society, 2008)
This paper presents the design and simulation of a serial AER LVDS communication link. It converts data from classical AER parallel bus with a 4-phase handshaking protocol into a bit stream which is transmitted serially ...
Ponencia
High-Speed Character Recognition System based on a complex hierarchical AER architecture
(IEEE Computer Society, 2008)
In this paper we briefly summarize the fundamental properties of spikes processing applied to artificial vision systems. This sensing and processing technology is capable of very high speed throughput, because it does ...
Artículo
Compact low-power calibration mini-DACs for neural arrays with programmable weights
(Institute of Electrical and Electronics Engineers, 2003)
This paper considers the viability of compact low-resolution low-power mini digital-to-analog converters (mini-DACs) for use in large arrays of neural type cells, where programmable weights are required. Transistors are ...
Artículo
A spatial contrast retina with on-chip calibration for neuromorphic spike-based AER vision systems
(Institute of Electrical and Electronics Engineers, 2007)
We present a 32 32 pixels contrast retina microchip that provides its output as an address event representation (AER) stream. Spatial contrast is computed as the ratio between pixel photocurrent and a local average between ...
Artículo
A neuromorphic cortical-layer microchip for spike-based event processing vision systems
(Institute of Electrical and Electronics Engineers, 2006)
We present a neuromorphic cortical-layer processing microchip for address event representation (AER) spike-based processing systems. The microchip computes 2-D convolutions of video information represented in AER format ...
Ponencia
OTA-C oscillator with low frequency variations for on-chip clock generation in serial LVDS-AER links
(IEEE Computer Society, 2009)
This paper presents the design and simulation of an OTA-C oscillator intended to be used as on-chip frequency reference. This reference will be part of the high speed clock generation circuit for Manchester serial LVDS-AER ...
Artículo
On the design and characterization of femtoampere current-mode circuits
(Institute of Electrical and Electronics Engineers, 2003)
In this paper, we show and validate a reliable circuit design technique based on source voltage shifting for current-mode signal processing down to femtoamperes. The technique involves specific-current extractors and ...
Ponencia
Exploiting memristance for implementing spike-time-dependent-plasticity in neuromorphic nanotechnology systems
(2009)
In this paper we show that STDP can be implemented using a crossbar memristive array combined with neurons that asynchronously generate spikes of a given shape. An attenuated version of such spikes needs to be sent ...
Ponencia
Event based vision sensing and processing
(IEEE Computer Society, 2008)
In this paper we briefly summarize the fundamental properties of spike events processing applied to artificial vision systems. This sensing and processing technology is capable of very high speed throughput, because it ...
Ponencia
Fully Digital AER Convolution Chip for Vision Processing
(IEEE Computer Society, 2008)
We present a neuromorphic fully digital convolution microchip for Address Event Representation (AER) spike-based processing systems. This microchip computes 2-D convolutions with a programmable kernel in real time. It ...