Buscar
Mostrando ítems 1-10 de 10
Ponencia
Experimental Body-input Three-stage DC offset Calibration Scheme for Memristive Crossbar
(IEEE, 2020)
Reading several ReRAMs simultaneously in a neuromorphic circuit increases power consumption and limits scalability. Applying small inference read pulses is a vain attempt when offset voltages of the read-out circuit are ...
Artículo
Enhanced Linearity in FD-SOI CMOS Body-Input Analog Circuits - Application to Voltage-Controlled Ring Oscillators and Frequency-Based sigma Delta ADCs
(Institute of Electrical and Electronics Engineers, 2020)
Abstract— This paper investigates the use of the body terminal of MOS transistors to improve the linearity of some key circuits used to implement analog and mixed-signal circuits integrated in Fully Depleted Silicon on ...
Ponencia
Neuron fault tolerance in spiking neural networks
(Institute of Electrical and Electronics Engineers. IEEE, 2021)
The error-resiliency of Artificial Intelligence (AI) hardware accelerators is a major concern, especially when they are deployed in mission-critical and safety-critical applications. In this paper, we propose a neuron ...
Ponencia
Implementation of binary stochastic STDP learning using chalcogenide-based memristive devices
(IEEE, 2021-04)
The emergence of nano-scale memristive devices encouraged many different research areas to exploit their use in multiple applications. One of the proposed applications was to implement synaptic connections in bio-inspired ...
Artículo
Oscillatory Neural Networks Using VO2 Based Phase Encoded Logic
(Frontiers Media, 2021)
Nano-oscillators based on phase-transition materials are being explored for the implementation of different non-conventional computing paradigms. In particular, vanadium dioxide (VO2) devices are used to design autonomous ...
Artículo
Event-driven implementation of deep spiking convolutional neural networks for supervised classification using the SpiNNaker neuromorphic platform
(Elsevier, 2020)
Neural networks have enabled great advances in recent times due mainly to improved parallel computing capabilities in accordance to Moore’s Law, which allowed reducing the time needed for the parameter learning of complex, ...
Artículo
Neuromorphic Low-Power Inference on Memristive Crossbars With On-Chip Offset Calibration
(IEEE, 2021-03)
Monolithic integration of silicon with nano-sized Redox-based resistive Random-Access Memory (ReRAM) devices opened the door to the creation of dense synaptic connections for bio-inspired neuromorphic circuits. One ...
Artículo
Hardware Implementation of Differential Oscillatory Neural Networks Using VO 2-Based Oscillators and Memristor-Bridge Circuits
(Frontiers Media, 2021)
Oscillatory Neural Networks (ONNs) are currently arousing interest in the research community for their potential to implement very fast, ultra-low-power computing tasks by exploiting specific emerging technologies. From ...
Tesis Doctoral
Memristor Based Event Driven Neuromorphic Nano-CMOS Processor
(2021-02-19)
‘Neuromorphic engineering’ has been showing significant developments in recent days. The word ‘neuromorphic’ was first coined by Caver Mead, which is morphing biological brain on-chip [1]. The main idea is to use the ...
Artículo
Digital Implementation of Oscillatory Neural Network for Image Recognition Applications
(Frontiers Media, 2021)
Computing paradigm based on von Neuman architectures cannot keep up with the ever-increasing data growth (also called “data deluge gap”). This has resulted in investigating novel computing paradigms and design approaches ...