Browsing by Author "Delgado Restituto, Manuel"
Now showing items 1-20 of 60
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1/f/sup y/ noise generation through a chaotic nonlinear switched-capacitor circuit [Presentation]
(Institute of Electrical and Electronics Engineers, 1992)A programmable switched-capacitor circuit for the generation of 1/f/sup y/ noise is reported. The circuit is described by ...
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A 0.18 μm CMOS low noise, highly linear continuous-time seventh-order elliptic low-pass filter [Presentation]
(The International Society for Optical Engineering- SPIE, 2005)This paper presents a fast procedure for the system-level evaluation of noise and distortion in continuous-time integrated ...
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A 0.18μm CMOS low-noise elliptic low-pass continuous-time filter [Presentation]
(Institute of Electrical and Electronics Engineers, 2005)This paper presents a seventh order low-pass continuous-time elliptic filter for use in a high-performance wireline ...
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A 2.2 μW analog front-end for multichannel neural recording [Presentation]
(Institute of Electrical and Electronics Engineers, 2017)In this paper an analog front-end for the multi-channel implantable recording of neural signals is presented. It is comprised ...
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A 330μW, 64-channel neural recording sensor with embedded spike feature extraction and auto-calibration [Presentation]
(Institute of Electrical and Electronics Engineers, 2014)his paper reports an integrated 64-channel neural recording sensor. Neural signals are acquired, filtered, digitized and ...
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A 4-mode reconfigurable low noise amplifier for implantable neural recording channels [Presentation]
(Institute of Electrical and Electronics Engineers, 2016)In this paper a reconfigurable implantable low noise amplifier for the recording of neural signals is presented. It is ...
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A 5.3mW, 2.4GHz ESD protected Low-Noise Amplifier in a 0.13μm RFCMOS technology [Presentation]
(Institute of Electrical and Electronics Engineers, 2007)An Electrostatic Discharge (ESD) protected Low- Noise Amplifier (LNA) for the 2.4 GHz ISM band designed in a 0.13 mum ...
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A 64-channel inductively-powered neural recording sensor array [Presentation]
(Institute of Electrical and Electronics Engineers, 2012)This paper reports a 64-channel inductively powered neural recording sensor array. Neural signals are acquired, filtered, ...
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A 76nW, 4kS/s 10-bit SAR ADC with offset cancellation for biomedical applications [Presentation]
(Institute of Electrical and Electronics Engineers, 2016)This paper presents a 10-bit fully-differential rail-to-rail successive approximation (SAR) ADC designed for biomedical ...
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A Chaotic Switched-Capacitor Circuit for 1/f Noise Generation [Article]
(Institute of Electrical and Electronics Engineers, 1992)A switched-capacitor circuit is reported for the generation of 1 / fYnoise. The circuit is described by a chaotic first-order ...
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A chaotic switched-capacitor circuit for characteristic CMOS noise distributions generation [Presentation]
(Institute of Electrical and Electronics Engineers, 2017)A switched-capacitor circuit is proposed for the generation of noise resembling the typical noise spectral density of MOS ...
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A complete retargeting methodology for mixed-signal IC designs [Presentation]
(Institute of Electrical and Electronics Engineers, 2001)In this paper, an efficient methodology to retargeting and reuse of embedded mixed-signal blocks is presented. Parametrized ...
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A High TCMRR, Inherently Charge Balanced Bidirectional Front-End for Multichannel Closed-Loop Neuromodulation [Presentation]
(Institute of Electrical and Electronics Engineers, 2019)This paper describes a multichannel bidirectional front-end for implantable closed-loop neuromodulation. Stimulation ...
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A Low-Power Programmable Neural Spike Detection Channel With Embedded Calibration and Data Compression [Article]
(Institute of Electrical and Electronics Engineers, 2012)This paper reports a programmable 400 μm pitch neural spike recording channel, fabricated in a 130 nm standard CMOS ...
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A low-power reconfigurable ADC for biomedical sensor interfaces [Presentation]
(Institute of Electrical and Electronics Engineers, 2009)This paper presents a 12-bit low-voltage low-power reconfigurable Analog-to-Digital Converter (ADC). The design employs ...
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A mixed-signal integrated circuit for FM-DCSK modulation [Article]
(Institute of Electrical and Electronics Engineers, 2005)This paper presents a mixed-signal application-specific integrated circuit (ASIC) for a frequency-modulated differential ...
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A modulator/demodulator CMOS IC for chaotic encryption of audio [Presentation]
(Institute of Electrical and Electronics Engineers, 1995)This paper reports the first experimental verification of chaotic encryption of audio signals using integrated circuits. ...
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A power efficient neural spike recording channel with data bandwidth reduction [Presentation]
(Institute of Electrical and Electronics Engineers, 2011)This paper presents a mixed-signal neural spike recording channel which features, as an added value, a simple and low-power ...
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A self-calibration circuit for a neural spike recording channel [Presentation]
(Institute of Electrical and Electronics Engineers, 2011)This paper presents a self-calibration circuit for a neural spike recording channel. The proposed design tunes the bandwidth ...
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A Sub-µW Reconfigurable Front-End for Invasive Neural Recording [Presentation]
(Institute of Electrical and Electronics Engineers, 2019)This paper presents a sub-μW ac-coupled reconfigurable front-end for the purpose of neural recording. The proposed topology ...