• Ponencia
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      ASIC-in-the-loop methodology for verification of piecewise affine controllers 

      Martínez Rodríguez, Macarena Cristina; Brox Jiménez, Piedad; Castro, Javier; Tena Sánchez, Erica; Acosta Jiménez, Antonio José; Baturone Castillo, María Iluminada (Institute of Electrical and Electronics Engineers, 2012)
      This paper exposes a hardware-in-the-loop metho- dology to verify the performance of a programmable and confi- gurable ...
    • Ponencia
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      Asymmetric clock driver for improved power and noise performances 

      Castro, Javier; Parra Fernández, María del Pilar; Valencia Barrero, Manuel; Acosta Jiménez, Antonio José (IEEE Computer Society, 2007)
      One of the most important sources of switching noise and power consumption in large VLSI circuits is the clock generation ...
    • Artículo
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      Effects of buffer insertion on the average/peak power ratio in CMOS VLSI digital circuits 

      Acosta Jiménez, Antonio José; Mora Gutiérrez, José Miguel; Castro, Javier; Parra Fernández, María del Pilar (Society of Photo-optical Instrumentation Engineers, 2007)
      The buffer insertion has been a mechanism widely used to increase the performances of advanced VLSI digital circuits and ...
    • Ponencia
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      Low-power differential logic gates for dpa resistant circuits 

      Tena Sánchez, Erica; Castro, Javier; Acosta Jiménez, Antonio José (Institute of Electrical and Electronics Engineers, 2014)
      Information leakaged by cryptosistems can be used by third parties to reveal critical information using Side Channel Attacks ...