Artículos (Arquitectura y Tecnología de Computadores)

URI permanente para esta colecciónhttps://hdl.handle.net/11441/11292

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Examinando Artículos (Arquitectura y Tecnología de Computadores) por Autor "Alibart, Fabien"

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    A memristive nanoparticle/organic hybrid synapstor for neuro-inspired computing.
    (Wiley, 2011) Alibart, Fabien; Pleutin, Stéphane; Bichler, Olivier; Gamrat, Christian; Serrano Gotarredona, María Teresa; Linares Barranco, Bernabé; Vuillaume, Dominique; Universidad de Sevilla. Departamento de Arquitectura y Tecnología de Computadores; European Union (UE)
    A large effort is devoted to the research of new computing paradigms associated with innovative nanotechnologies that should complement and/or propose alternative solutions to the classical Von Neumann/CMOS (complementary metal oxide semiconductor) association. Among various propositions, spiking neural network (SNN) seems a valid candidate. i) In terms of functions, SNN using relative spike timing for information coding are deemed to be the most effective at taking inspiration from the brain to allow fast and efficient processing of information for complex tasks in recognition or classification. ii) In terms of technology, SNN may be able to benefit the most from nanodevices because SNN architectures are intrinsically tolerant to defective devices and performance variability. Here, spike‐timing‐dependent plasticity (STDP), a basic and primordial learning function in the brain, is demonstrated with a new class of synapstor (synapse‐transistor), called nanoparticle organic memory field‐effect transistor (NOMFET). This learning function is obtained with a simple hybrid material made of the self‐assembly of gold nanoparticles and organic semiconductor thin films. Beyond mimicking biological synapses, it is also demonstrated how the shape of the applied spikes can tailor the STDP learning function. Moreover, the experiments and modeling show that this synapstor is a memristive device. Finally, these synapstors are successfully coupled with a CMOS platform emulating the pre‐ and postsynaptic neurons, and a behavioral macromodel is developed on usual device simulator.