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Ponencia
Stochastic and PWM coding for an efficient implementation of Cellular Neural Networks
(1997)
This paper present the application of Pulse Stream Tech-niques (PSTs) to the hardware implementation of a Cellular Neural Network. The time differential equation of this networks suggests that the dynamic of one neuron ...
Ponencia
Circuito integrado para comunicaciones en sistemas de ascensores
(2009)
El circuito ASIC descrlto es una unidad de comunicaciones destinada a sistemas de ascensores. Este diseño reduce en gran medida de las necesidades de cableado que encarece la instalación de los sistemas de ascensores. Por ...
Ponencia
An analog CMOS universal membership function circuit with fully independent, adjustable parameters
(1997)
A novel CMOS membership function circuit (MBC) is presented. It is based on a linear tunable transconductor proposed in [1] and implements trapezoidal/triangular functions with all parameters (slope, position, width, eight ...
Ponencia
CMOS fuzzifier using mixed-signal techniques with emphasis in power consumption
(1999)
A novel mixed-signal CMOS membership function generator (MFG) is presented. It is based on an enhanced version of a linear tunable transconductor proposed in [1] and implements trapezoidal/triangular functions with all ...
Ponencia
ASITRON: ASIC for indirect vector control of induction motors with fuzzy logic based speed regulation
(2001)
This paper presents ASITRON, an integrated solution for the vector control of induction motors. This ASIC is a micro-system that integrates, in a chip, all the logic required by the indirect vector control method. ASITRON ...
Ponencia
Circuito integrado ASIC para el control vectorial-borroso de un motor de inducción destinado a accionamiento de tráfico vertical
(Universidad de Zaragoza, 1995)
Con este trabajo se describe el diseño de un circuito integrado ASIC para el Control Vectorial-Borroso de un Motor de Inducción Destinado a Accionamiento de Tráfico Vertical. Se presentan, además, algunos resultados de ...
Ponencia
Red Neuronal de Hopfield con técnicas de procesamiento estocástico paralelo-secuencial
(2009)
En este artículo se presenta la realización de una Red Nueronal Estocástica de Hopfield (SHNN) con un gran número de unidades. Originalmente, la SHNN propuesta por van de Bout, requiere tiempos de convergencia grandes al ...
Ponencia
Automatic synthesis of analog fuzzy controllers
(1997)
In this paper, a silicon compiler for analog fuzzy controllers is presented. The layout is automatically generated automatically, startingfrom a set of user specificationssuch as numberof rules, number of inputs and ...
Ponencia
ASIC implementation of an ARM - based system on chip
(2000)
This paper presents the hardware architecture of a System on Chip (SoC) implemented in an ASIC. It has been designed for a wide range of applications and will be used in a power line modem. A set of reusable cells based ...
Artículo
Integrated solution for induction motor control
(2002-05)
The command speed has an 'S' shape, typical in vertical operation systems. The reason for this command speed is that a soft acceleration/deceleration avoids abrupt movements in the elevator cabin, increasing the comfort ...