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Mostrando ítems 1-10 de 39
Ponencia
A Reuse-based framework for the design of analog and mixed-signal ICs
(The International Society for Optical Engineering -SPIE, 2005)
Despite the spectacular breakthroughs of the semiconductor industry, the ability to design integrated circuits (ICs) under stringent time-to-market (TTM) requirements is lagging behind integration capacity, so far keeping ...
Ponencia
Design of a 1.2-V Cascade Continuous-Time Sigma-Delta Modulator for Broadband Telecommunications
(Institute of Electrical and Electronics Engineers, 2006)
This paper presents the design of a continuous-time multibit cascade 2-2-1 sigma-delta modulator for broadband telecom systems.
Ponencia
Geometrically-constrained, parasitic-aware synthesis of analog ICs
(The International Society for Optical Engineering - SPIE, 2005)
In order to speed up the design process of analog ICs, iterations between different design stages should be avoided as much as possible. More specifically, spins between electrical and physical synthesis should be reduced ...
Ponencia
An algorithm for numerical reference generation in symbolic analysis of large analog circuits
(Institute of Electrical and Electronics Engineers, 1997)
This paper addresses the problems arising in the calculation of numerical references (network function coefficients), essential for an appropriate error control in simplification before and during generation algorithms for ...
Ponencia
An accurate error control mechanism for simplification before generation algorithms
(Institute of Electrical and Electronics Engineers, 1999)
The use of simplification before generation techniques to enable the approximate symbolic analysis of large analog circuits is discussed. This paper introduces an error control mechanism to drive the circuit reduction, ...
Ponencia
Accurate VHDL-based simulation of Sigma Delta modulators
(Institute of Electrical and Electronics Engineers, 2003)
The computational cost of transient simulation of /spl Sigma//spl Delta/ modulators (/spl Sigma//spl Delta/Ms) at the electrical level is prohibitively high. Behavioral simulation techniques offer a promising solution to ...
Ponencia
RAPID-retargetability for reusability of application-driven quadrature D/A interface block design
(Institute of Electrical and Electronics Engineers, 1999)
This paper describes ESPRIT 29648, concerning the development of an advanced methodology for the design of a mixed-signal application-driven quadrature D/A interface sub-system, aiming at its reusability by a retargetting ...
Ponencia
Symbolic analysis tools-the state of the art
(Institute of Electrical and Electronics Engineers, 1996)
This paper reviews the main last generation symbolic analyzers, comparing them in terms of functionality, pointing out also their shortcomings. The state of the art in this field is also studied, pointing out directions ...
Artículo
High-level synthesis of switched-capacitor, switched-current and continuous-time ΣΔ modulators using SIMULINK-based time-domain behavioral models
(Institute of Electrical and Electronics Engineers, 2005)
This paper presents a high-level synthesis tool for ΣΔ Modulators (ΣΔMs) that combines an accurate SIMULINK-based time-domain behavioral simulator with a statistical optimization core. Three different circuit techniques ...
Ponencia
Continuous-time cascaded ΣΔ modulators for VDSL: A comparative study
(The International Society for Optical Engineering - SPIE, 2005)
This paper describes new cascaded continuous-time ΣΔ modulators intended to cope with very high-rate digital subscriber line specifications, i.e 12-bit resolution within a 20-MHz signal bandwidth. These modulators have ...