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Ponencia
Un simulador de memorias cache multinivel
(Universidad de las Islas Baleares, Servicio de Publicaciones, 2001)
En este trabajo, se describe un simulador gráfico denominado Simula Cache 1.0, que facilita la realización de prácticas sobre jerarquía de memoria en cursos de arquitectura y estructura de computadores. Está inspirado ...
Ponencia
Software Generation of Address-Event-Representation for Interchip Images Communications
(IEEE, 2002-11)
Address-Event-Representation (AER) is a communications protocol for transferring images between chips, originally developed for bio-inspired image processing systems. Such systems may consist of a complicated hierarchical ...
Ponencia
Neuro-Inspired Real-Time USB & PCI to AER Interfaces for Vision Processing
(IEEE, 2008-06)
Address-Event-Representation (AER) is an emergent neuromorphic interchip communication protocol that allows for real-time virtual massive connectivity between huge number neurons located on different chips. By exploiting ...
Ponencia
PCI-AER interface for Neuro-inspired Spiking Systems
(IEEE Computer Society, 2006)
Address event representation (AER) is a neuromorphic interchip communication protocol that allows for real-time connectivity between huge number neurons located on different chips. By exploiting high speed digital communication ...